msp33327@uxa.cso.uiuc.edu (Michael S. Pereckas) (02/09/91)
In <26337@dime.cs.umass.edu> yodaiken@chelm.cs.umass.edu (victor yodaiken) writes: >In article <BBC.91Feb8091541@sicilia.rice.edu> Benjamin Chase <bbc@rice.edu> writes: >> >>Providing hardware support specifically for these things is unwise. >>The expected performance benefit does not justify the required >>additional complexity of the hardware. Trigonometric and exponential >>functions represent a minute fraction of the average instruction usage >>of general purpose computers. We all understand that you are not >>doing general purpose computing. We don't care. We are very sorry >>that your computer usage represents a minority, and thus has less >>clout when it comes time to design hardware, languages, etc., etc. >> >It might be more interesting to have a discussion about the >diffculty of special purpose architectures and the appropriate >achitectures for scientific computation than to have a discussion about >marketing requirements. Programmable architectures, in which users could >configure the machine for a particular algorithm have implications for >architectures, programming languages and operating systems. I know that >there have been some attempts at such architectures (mostly programmable >pipelines), but would like to >hear about current efforts and/or reasons why such designs would be good or >bad ideas. Sounds like a systolic array. Wasn't someone (Intel?) working on some sort of spiffy programmable systolic array? I recall hearing something a while ago. The idea is appealing, but I'm not certain how wide a range of problems it would be useful for. I also wonder whether compilers could effectivly produce code for a systolic array from dusty deck source code. Efficient auto-vectorizing fortran compilers greatly helped the acceptance of vector supercomputers, after all. One imagines that time sharing might be a problem, also, considering how much state information might have to be saved and restored. -- Michael Pereckas * InterNet: m-pereckas@uiuc.edu * just another student... (CI$: 72311,3246) Jargon Dept.: Decoupled Architecture---sounds like the aftermath of a tornado
sef@kithrup.COM (Sean Eric Fagan) (02/09/91)
In article <1991Feb9.015302.5003@ux1.cso.uiuc.edu> msp33327@uxa.cso.uiuc.edu (Michael S. Pereckas) writes: >Sounds like a systolic array. Wasn't someone (Intel?) working on some >sort of spiffy programmable systolic array? "In essence, Splash is a programmable linear logic array that can be configured to suit the problem at hand; it bridges the gap between the traditional fixed-function VLSI systolic array and the more versatile programmable array." Not quote what you wanted, but close, I suspect. The quote above is taken from "Building and Using a Highly Parallel Programmable Logic Array," by Maya Gokhale et al, Supercomputing Research Center, and Daniel Lopresite, Brown University. I found it in the January 1991 issue of "Computer," which was "Experimental Research in Computer Architecture." (Actually, a friend was reading the article, which I'd only skimmed, and he ranted and raved about it for almost a week 8-).) -- Sean Eric Fagan | "I made the universe, but please don't blame me for it; sef@kithrup.COM | I had a bellyache at the time." -----------------+ -- The Turtle (Stephen King, _It_) Any opinions expressed are my own, and generally unpopular with others.