khj@uncecs.edu (Kenneth H. Jacker) (03/03/91)
Can anyone suggest a reference for an ISP (instruction set processor) description of the VAX CPU? Ideally, I'd like to find the complete specification. At a minimum, I'd like ISP for the effective address calculation for all addressing modes. Thanks in advance for any help, -- Kenneth H. Jacker Domain: khj@ms.appstate.edu Dept of Math Sciences khj@ecsvax.uncecs.edu Appalachian State Univ Boone, NC 28608 BITNET: khj@appstate