R.Peel@ee.surrey.ac.uk (Roger Peel) (03/27/91)
* Are you considering using transputers in industrial or research applications?
* Are you charged with teaching a parallel programming or parallel
architectures course or setting up a student parallel hardware laboratory?
* Have you missed out on the current transputer architecture and programming
paradigms but need a rapid introduction before you can exploit the vastly
greater power and connectivity of the new H1 transputer?
* After an initial assessment of the architecture, do you want to learn how
to harness the full benefits of parallelism?
The TRANSPUTING '91 conference, to be held soon in California, will be
an extremely efficient learning experience, offering answers to these questions
as well as your own.
This meeting - by far the largest transputer conference yet run in the U.S.A. -
will be hosting a full technical disclosure of the new 150 MIPs, 20 MFLOPs H1
transputer, introductory and advanced tutorials, invited papers from influential
transputer experts and 67 contributed papers covering industrial applications,
research directions in many subjects, hardware and software topics, to name a
few. Some 20 exhibitors will be demonstrating most of the hardware and software
products available to industrial and educational establishments, and there will
be non-commercial demonstrations and a large selection of posters.
TRANSPUTING '91 - conference from 23rd to 25th April, 1991
- tutorials on 22nd and 26th April, 1991
- at the Sunnyvale Hilton, California
The TRANSPUTING '91 Tutorials
=============================
The tutorials outlined below are being provided by experienced members of
the transputer community as an inexpensive educational service for
delegates to TRANSPUTING '91. All will attempt to provide a practical
guide to the topics presented, so that attendees may rapidly apply the
knowledge gained. More details, together with registration information,
may be obtained from the addresses at the bottom of this message.
Communicating Process Architectures and Transputer Overview
-----------------------------------------------------------
This tutorial will serve as an introduction to parallel processing using
communicating processes.
Distributed memory multiprocessing is becoming acknowledged as the most
promising parallel processing technique for a large range of applications,
due to its scalability - as extra processors are added to a configuration,
they bring their own memory which may be accessed independently of the
rest. The INMOS transputer comprises a high-performance RISC-like
processor, on-chip memory, specialised communication engines and an
instruction architecture designed to support inter-transputer
communication.
This tutorial is designed to prepare delegates new to transputers to
understand the rest of the material to be presented throughout the
conference. Its software element will concentrate on the principles of
communication, synchronisation, load balancing and deadlock. The hardware
element will highlight the important features of the transputer
architecture and show how easily current transputer products may be
incorporated into a range of hardware designs.
Designing Parallel - Going Sequential
-------------------------------------
This tutorial will illustrate a selection of program specification, design
and implementation techniques suitable for use with the transputer.
More advanced than the 'Communicating Process Architectures Overview',
it will provide examples of parallel programming structures and design
techniques. It could be a useful basis for your own transputer teaching.
Particular topics covered will be :
* Methods for terminating groups of parallel processes of arbitrary complexity.
* Various configurations of buffering, double buffering, pipelines,
multiplexers and demultiplexers will be shown to maximise throughput of
data with varying degrees of complication.
* The advantages of parallelism and communication to replace the use of
interrupts, signals and polling will be demonstrated.
* How to write, simulate and test parallel processes independently of each
other, prior to final integration.
Having illustrated the benefits and simplicity of designing software as
collections of parallel processes, the tutorial will conclude by
highlighting recent work on serialising parallel processes. The authors
will demonstrate how the design of sequential code can be simplified by
first incorporating parallelism.
Formal Methods for Transputing
------------------------------
Intended audience: Engineers with prior exposure to transputers and occam.
Objectives: To give an overview of the benefits of formal methods and a
limited repertory appropriate for use in parallel programming.
Introduction : What are formal methods, and how can they help?
Why formal methods are particularly necessary for
concurrent programming.
Why occam is particularly well suited to formal analysis:
clean semantics and theoretical underpinning.
The Laws of occam Programming.
Transformation of occam programs.
Simple ways of avoiding deadlock.
Case studies:
a small worked example;
how the T800 FPU verification worked.
Pointers to further sources of information and tuition.
Logic Programming on Transputers
--------------------------------
Recently, significant efforts have been made to implement logic
programming languages on distributed memory systems and particularly on
multi-transputers. This tutorial is intended to present the main
directions in the progress of logic programming languages towards their
efficient implementation on distributed memory systems. It surveys the
major problems of implementing logic programs on multi-transputer systems
and summarizes the solutions provided by the existing commercial systems
and undergoing research projects.
Attendees are expected to be familiar with sequential Prolog.
Mixed Language Programming on the Transputer
--------------------------------------------
The aim of this tutorial is to show how languages such as C, FORTRAN and
Pascal can be used effectively in transputer-based systems. This reflects
the fact that there are a large number of existing programs which could be
utilised in such systems.
The tutorial will emphasise not only the role of these traditional
sequential languages but also the role of occam to implement the parallel
parts of a system design. By means of examples it will be shown how
functions, subroutines and procedures written in these other languages can
be easily incorporated into an occam harness, thereby ensuring that the
parallel aspects of the system are implemented using the most appropriate
language and the sequential parts also use the most suitable language or
existing code.
Mechanisms will also be discussed that preserve the syntax and semantic
checking provided by occam channel protocols when these channels are
connected to processes not written in occam. This is of vital importance
if the security of occam channel communication is to be retained within
the parallel part of a mixed system.
The concept of generally available harnesses for running an existing
sequential program will also be discussed. Such harnesses enable the
performance of a single transputer implementation of an existing system to
be quickly evaluated. For suitable applications, these harnesses also
provide a means of parallelising the system with very little effort.
The characteristics of suitable applications will be discussed.
Parallelising Existing Code
---------------------------
"Will it run our existing applications faster?" - for many users, this is
the crucial question in deciding whether to include transputers among
their computing resources. If the answer is important to you, then you
should attend this tutorial. Whether you are completely new to transputers
(perhaps even to parallel computing), or knowledgeable, experienced and
confident about developing new parallel applications, you do not need to
be told what magic the transputer can perform in general, but whether, and
how, that magic can be worked on your existing code.
That will be the emphasis of these presentations by experts in
parallelisation, designed to set out the possibilities and approaches that
are tried and tested in practice, so that you can decide how they can be
applied to your own software. The session will cover:
- Introduction and overview
- Effective paradigms
- Hazards, problems and performance issues
- Support tools, and automating the parallelisation process
- Pre-packaged schemes
- A representative software environment
The tutorial is aimed at software managers, software engineers and
programmers. It will concentrate on parallelising software written in
Fortran and C. It assumes no special background knowledge.
Transputer Programming Environments
-----------------------------------
This tutorial will be devoted to the latest program development
environments for parallel systems.
Those using transputers and other parallel processors realize that
developing programs to run on such systems is often a tedious and
time-consuming chore. The task of explicitly managing the routing of
messages is particularly difficult. The problem is greatly magnified when
the user must adapt to changing topologies or to completely different
machines. Debugging a program running on multiple processors can be a
nightmare. Commercial solutions to these problems, however, have begun to
appear.
Representatives of several firms have been invited to present technical
discussions of their products at this full-day session. These talks will
cover the latest offerings in program development tools for transputers
and similar systems. Emphasis will be placed on topology-independent and
machine-independent programming, dynamic debugging of multi-node programs,
and real-time environments. Several of the packages under discussion run
on parallel processors other than transputers, and on workstations.
Firms and products will include:
Cornell/Ohio State University: Trollius
Transtech: Genesys
Meiko: CS Tools
Strand: Strand
Parasoft: Express
MIMD Systems: Helios
JMI Software Consultants: Real Time Systems
Intelligent Systems Intl: TRANS-RTXc
Computer System Architects: Modula II and C tools
This tutorial will provide an excellent opportunity for old and new users
to become acquainted with the latest tools for developing parallel
programs.
Embedded Real-Time Control Systems
----------------------------------
This tutorial / workshop will concentrate on the practical aspects of
developing transputer-based real-time systems. Most of the examples will
be drawn from two demonstrations and experiments.
Representatives of Yale University will describe their experiments in
Robot Juggling - a demanding transputer-based real-time motion control
application. This system senses ball position via a stereo vision system,
and uses 3-D triangulation to produce an x-y-z position for the ball at
60Hz. The x-y-z position of the ball is then passed into a linear
observer, which estimates current ball position and velocity at a rate
much higher than the output of the vision system. The resulting position
and velocity estimates are then processed at a rate of 1KHz by the
juggling algorithm to produce commands (robot position and velocity) to
the robot controller. Any of a family of robot control algorithms is then
used to produce torque commands for the robot.
The tutorial will work through the design, showing how transputers are
utilised in each section.
The aim of the second part of this workshop is to demonstrate by means of a
hands-on experiment, how parallelism provides both a unified design method
for a real-time control problem and a way of increasing system performance
as well.
The goal is to let the attendees design and implement a program that
controls a stepper motor using parallel design methods. The stepper motor
consists of eight coils and a rotating magnet. Each coil can be actuated
separately. Also, multiple coils can be actuated in order to obtain
intermediate positions of the rotor. Buttons may be programmed to control
the motor movements, e.g. single step forward and backward, or
acceleration and deceleration of a continuous motion. Several design and
implementation methods will be given, to demonstrate that parallel
programming is simplicity itself, and can even be great fun! The theme of
this session will be "Thinking in Parallel"
Operating Systems and Real-time Kernels
---------------------------------------
Julian Wilson, INMOS Strategic Applications Manager, will organise this
session on operating systems and real-time kernels.
The tutorial will cover :
* Transputer hardware support for real-time kernels
* Enhancements to the H1 family for kernels
* Industry-standard real-time kernels for the transputer - VRTX and C-Executive
* Transputer UNIX operating system strategy - HELIOS and CHORUS
Designing Parallel - a hands-on design workshop
-----------------------------------------------
This workshop will concentrate on the design issues of embedded systems,
and is particularly relevant to those teaching parallel programming.
A hands-on session will give delegates the opportunity, under expert
guidance, to design and implement a small parallel simulation program.
The majority of the workshop will hinge around the design of a control
processor for a photocopier. Several different approaches to the design
of the controller will be presented, incorporating varying degrees of
parallelism. The effects of this parallelism on the device drivers, the
central control logic and the error recovery mechanisms will be examined,
and the lessons learned may explain some of the more irritating features
of current commercial products! The contrast between top-down and
bottom-up design techniques in parallel programming will also become
apparent. The designs will eventually be run on a T222 transputer
training board, equipped with a range of peripheral interfaces capable of
emulating the buttons and displays of a photocopier.
This workshop will be especially valuable to educators, either in industry
or from academic institutions. It will include a session on how to
incorporate parallelism into Computer Science and Electronic Engineering
syllabuses, and the particular issues which students find difficult.
Computer Systems Architects (CSA) will present their low-cost transputer
Education Kit, and discuss the design of the tutorial material included
with it. In addition, the conference delegates have been invited to bring
small posters describing individual student projects, and these will be
used to illustrate the wide range of educational activities which can be
centred around transputer products.
Image Processing - a hands-on workshop
--------------------------------------
This tutorial aims to cover the basic concepts of image processing and
then to relate these to implementations on transputers.
The tutorial will be of interest to those people who are considering the
potential of Image Processing and wish to understand how a transputer
implementation is different from a non-parallel implementation.
The morning tutorial lectures will be accompanied by a workbook containing
the viewfoils used throughout the session. The topics to be covered are:
* Introduction to Image Processing
* Image display using transputers
* Image Processing using transputers
The afternoon hands-on session is designed to give some experience of
the topics covered earlier in the day. Depending on the number of
attendees, the afternoon session may be organised as a series of
demonstrations instead. To obtain maximum benefit, attendees should
be familiar with occam and / or C.
Scientific Computing
--------------------
This tutorial presents a range of different parallel processing techniques
and application areas in many fields of science, including both basic
research and industrial applications. It demonstrates how the transputer
can provide cost-effective solutions to previously intractable problems,
and how it opens up new possibilities for research and exploitation.
Topics to be covered during the day include
- Neural networks
- A large molecular dynamics simulation using a systolic ring of transputers
- Scientific applications in the oil industry
- Computational fluid dynamics
- Finite element methods
- Cellular automata
and more besides.
The day will be divided into sessions of approximately one hour, each of
which will :
Survey the field of scientific applications in some specific area or
using some particular approach
or
Present significant results achieved using transputers
or
Describe some interesting approach which may give you new ideas
for research and applications
Office Automation Applications
------------------------------
Stephen Maudsley, INMOS Strategic Applications Manager, will be organising
this session. It will involve presentations, workshops and demonstrations
of office automation products using transputers, including the upgrade
path to exploit H1 technology. The products will include :
* Laser printers - low-end raster image processors (RIPs) to high-end
Postscript interpreters.
* Disk arrays - exploiting the transputer and INMOS link technology for
multiple disk systems
* X-terminals - porting the X-server onto transputers
Communications Applications
---------------------------
Neil Richards, INMOS Telecoms Segment Manager, will discuss the use of
transputers in general purpose telecommunication systems, ranging from
LANs to public switching systems. The tutorial will include
presentations, workshops and demonstrations on the following topics :
* INMOS link technology for communications systems
* Using the transputer and INMOS link technology in LAN interfacing -
Ethernet, FDDI, token ring
* Using the transputer in next generation PABX and central office
switching systems - ISDN, ATM / STM
Artificial Intelligence
-----------------------
The morning session of the workshop will provide an introduction and
overview of parallel genetic algorithms, and it will discuss fine-grained
parallel genetic algorithms. The session will be divided into three
roughly equal parts:
1. Introduction and overview of (sequential) genetic algorithms
- introduction (biology or computer science?)
- mechanical details of the algorithm
- why genetic algorithms work
- example applications
2. Theory of parallel genetic algorithms
- implicit parallelism
- explicit parallelism of population subdivision
- interactions among subpopulations
- explicit fine-grained parallelism
3. Fine-grained parallel genetic algorithms
- one processor per individual model
- replication strategies (conventional, location-based, resource-based,
pattern-based)
- implementation issues
- research questions
- example applications
The afternoon session of the workshop will focus primarily on the practical
aspects of implementing genetic algorithms on transputer networks. Many of
the issues raised, such as scalability, load balancing, efficiency and
deadlock freedom, have more general application in parallel processing.
The session will be divided into four parts of approximately equal length.
- General issues in scalable efficient implementations of fine-grained
parallel genetic algorithms on coarse grained transputer networks.
- Three parallel genetic algorithms, farming, migration and diffusion,
and their implementation on transputer networks.
- Applications and studies of parallel genetic algorithms. Evaluation
and comparison of the different models and implementations.
- Demonstration of implementations and visualisation software.
Question time.
The workshop will draw on work done in Europe using transputers and
parallel genetic algorithms and in particular the ongoing research at
Buckingham University in the UK and GMD in Germany. Two major applications
of parallel genetic algorithms will be described, the solution of TSP
problems and the search for application specific structured neural
networks.
Attention will also be drawn to the practicality and cost effectiveness of
transputer networks used in conjunction with the occam programming
language.
The Helios Operating System - a hands-on workshop
-------------------------------------------------
Helios is a distributed operating system designed to run on MIMD
computers. Its Open System architecture provides complete parallel
programming support for both personal and super computers.
Since 1986, Helios has been chosen by most leading transputer
manufacturers as their preferred operating system. The key to this
success is its Unix environment and adherence to international standards
such as POSIX and X-Windows. Its programming support is comprehensive.
It includes a wide range of development tools, languages and networking
support.
The Helios tutorial provides a comprehensive overview of the product. The
morning session will cover the basic concepts of Helios and its tools, as
well as a practical workshop. During the afternoon, application case
studies will be described, followed by a discussion focussing on the
future direction of Helios.
Further Details
===============
For additional program / tutorial information, call Executive Meeting
Management in the U.S.A. at 1-800-828-7494 or (717) 731 9295. A message
recorder and a facsimile machine are also available 24 hours a day on the
second number.
Alternatively, write to :
Executive Meeting Management,
PO Box 434,
Camp Hill,
PA 17001
USA
Full details may be requested by electronic mail from :
Dyke Stiles ( stiles@cc.usu.edu )
or myself, Roger Peel ( r.peel@ee.surrey.ac.uk )
Alternatively, call the chairman or secretary of your national Transputer
or occam user group.
-----------------------------------------------------------------------------
Roger M.A. Peel
Department of Electronic and Phone : +44 483 509284 (0483 from UK)
Electrical Engineering Fax : +44 483 34139
University of Surrey Telex : 859331
Guildford JANET : R.Peel@uk.ac.surrey.ee
Surrey GU2 5XH UUCP : ...mcsun!ukc!ee.surrey.ac.uk!R.Peel
United Kingdom