my@falcon.nsc.com (Michael Yip) (03/15/91)
I read from the newspaper that good old Data General is introduced a new AViiON machine that is 115 MIPS. And the machine is available today (better than MIPS and Moto to introduce only their plans). Can anyone tell us what the machine is all about? Do they use a few 88000's running in parallel? They also claimed it runs UNIX and use disk arrays. -- Mike my@berlioz.nsc.com PS: Oh boy, our "100 MIPS" Swordfish seems slow now.
sysmgr@KING.ENG.UMD.EDU (Doug Mohney) (03/15/91)
In article <1991Mar14.184416.3251@berlioz.nsc.com>, my@falcon.nsc.com (Michael Yip) writes: >I read from the newspaper that good old Data General is introduced >a new AViiON machine that is 115 MIPS. And the machine is available >today (better than MIPS and Moto to introduce only their plans). Funny, I saw this mysterious full page ad in the local newspaper showing a pizza box (not a machine, a pizza box) with "Data General" on it, and my first response was "They're still around?" I suppose they're due for another footnote these days...] Reform may be dying in the Soviet Union, but we have the right to introduce it to the DECUS Board of Directors. -- > SYSMGR@CADLAB.ENG.UMD.EDU < --
mslater@cup.portal.com (Michael Z Slater) (03/16/91)
>I read from the newspaper that good old Data General is introduced >a new AViiON machine that is 115 MIPS. And the machine is available >today (better than MIPS and Moto to introduce only their plans). MIPS ratings of multiprocessor machines aren't necessarily meaningful. If I have one task I want to run, that 115 MIPS machine is only one-fourth that speed. (It is a four-processor system.) The most interesting part of it, from my point of view, is that is uses a new cache/MMU chip that Moto announced at the same time. The 88204 CMMU has 64 Kbytes of cache RAM on a single chip, along with the cache control and MMU. That's right, 64K with no external SRAMs. It's priced at $495 in 1000s and avilability is promised for April. The press release doesn't say whether any improvements were made to the CMMU other than quadrupling its size. The size alone is impressive, and is especially useful in an MP system where minimizing memory bus bandwidth used by each processor it critical. Michael Slater, Microprocessor Report mslater@cup.portal.com
my@tern.nsc.com (Michael Yip) (03/16/91)
> MIPS ratings of multiprocessor machines aren't necessarily meaningful. > If I have one task I want to run, that 115 MIPS machine is only one-fourth > that speed. (It is a four-processor system.) I agree with you. But I think that DG's target is multiuser system which support many users at the same time. That is quite a bit of difference from a super-desktop-personal-workstation which will probably benefit more from a high MIPS single processor system. How fast is each processor anyway? Let's see ... 115/4 = 31 MIPS ... so the processor is 40MHz? (Is 88K a super-scaler? Not yet, right?) > The most interesting part of it, from my point of view, is that is uses > a new cache/MMU chip that Moto announced at the same time. The 88204 CMMU > has 64 Kbytes of cache RAM on a single chip, along with the cache control > and MMU. That's right, 64K with no external SRAMs. It's priced at $495 in > 1000s and avilability is promised for April. Nice. By the way, do you know if Moto implemented the 88204 CMMU with 2T or 4T cells? Also, if the 88204 is a first level cache, is DG implementing a second level cache? (Or it's getting too complicated to do that on a multiprocessor system?) It will be nice if the 88204 CMMU offers onchip first level cache and support external SRAM from second level cache using the just one chip.;) > The press release doesn't say whether any improvements were made to the CMMU > other than quadrupling its size. The size alone is impressive, and is > especially useful in an MP system where minimizing memory bus bandwidth used > by each processor it critical. By the way, what cahce protocol does the 88204 use to support multiprocessor system? (See i don't know much about the 88K family.) -- Mike Yip my@berlioz.nsc.com
glew@pdx007.intel.com (Andy Glew) (03/17/91)
> MIPS ratings of multiprocessor machines aren't necessarily meaningful. > If I have one task I want to run, that 115 MIPS machine is only one-fourth > that speed. (It is a four-processor system.) I agree with you. But I think that DG's target is multiuser system which support many users at the same time. That is quite a bit of difference from a super-desktop-personal-workstation which will probably benefit more from a high MIPS single processor system. I'm a super-desktop-personal-workstation user... Myself, I'd rather have several processors on my desk than a processor much more powerful than I already have. (Assuming memory, etc. okay) Why? Because I do mainly integer work, I frequently run multiple processes (or, at least, other people use the "spare cycles" of my workstation to run multiple CPU intensive processes, making my machine unusable), and, many of my "roll your own" applications that I write myself are trivially parallizable. Anticipating the flame war, I'll duck out for a while... -- --- Andy Glew, glew@ichips.intel.com Intel Corp., M/S JF1-19, 5200 NE Elam Young Parkway, Hillsboro, Oregon 97124-6497 This is a private posting; it does not indicate opinions or positions of Intel Corp.
lindsay@gandalf.cs.cmu.edu (Donald Lindsay) (03/18/91)
In article <40198@cup.portal.com> mslater@cup.portal.com (Michael Z Slater) writes: >MIPS ratings of multiprocessor machines aren't necessarily meaningful. >If I have one task I want to run, that 115 MIPS machine is only one-fourth >that speed. (It is a four-processor system.) Yes, but I would argue that all workstation and mini companies should have multiprocessors in their product line. It is a reasonable way to build server machines, for instance. [It's also a way to stay ahead of the IBM RS/6000, which reportedly won't be multiprocessor until 1995 or 1996.] Now that OSF/1 (with Mach's threads) is on the way, and with a thread SunOS reportedly on the way, and an IEEE standard for a C thread library, the way is open for portable multithreaded applications. (Of course, it isn't clear yet where these applications will become dominant, or whether the threading will be responsible for that success.) >The [large cache] size ... is especially useful in an MP system where >minimizing memory bus bandwidth used by each processor is critical. In theory, yes. However, I was pleasantly surprised to discover that a quad-processor Omron Luna (4 25 MHz 88000's) runs four copies of our ray-tracer, exactly as fast as it runs one copy. I hope to report soon on how fast it runs a single copy that has forked itself into four threads. -- Don D.C.Lindsay .. temporarily at Carnegie Mellon Robotics
tak@bnr-rsc.UUCP (Mike Takefman) (03/19/91)
In article <1991Mar16.073539.823@berlioz.nsc.com> my@tern.nsc.com (Michael Yip) writes: | |> MIPS ratings of multiprocessor machines aren't necessarily meaningful. |> If I have one task I want to run, that 115 MIPS machine is only one-fourth |> that speed. (It is a four-processor system.) | ........deleted......... |How fast is each processor anyway? Let's see ... 115/4 = 31 MIPS ... |so the processor is 40MHz? (Is 88K a super-scaler? Not yet, right?) I have a DG AViiON-100 on my desk. Even though it is a 16.67 MHz 88k, DG insists on calling the box a 17 Mips machine. Xcalc gives me 115/4=28.75 so I'm guessing that the marketing types are being a little more honest and refering to a 33 MHz 88k as a 28.75 MIP processor, (unless they are calling a 25MHz 88k a 29 MIP processor :-). Otherwise I have no info on this machine. -- Michael Takefman The more you smoke, the less you poke. Bell Northern Research From the Canne Advertising-Film Festival 1990 Computer Architecture Exploration Group Email: uunet!bnr-vpa!bnr-rsc!tak - Voice:613-765-4333
jcallen@Encore.COM (Jerry Callen) (03/19/91)
In article <12391@pt.cs.cmu.edu> lindsay@gandalf.cs.cmu.edu (Donald Lindsay) writes: >[It's also a way to stay ahead of the IBM RS/6000, which reportedly >won't be multiprocessor until 1995 or 1996.] Hmmmmmm, reported by whom? IBM has been building multiprocessor mainframes for a long time, and it would really surprise me if it takes them 4 years to build an MP RS/6000. But then I don't work for IBM, so what do I know? -- Jerry Callen jcallen@encore.com
mcdonald@aries.scs.uiuc.edu (Doug McDonald) (03/19/91)
In article <14337@encore.Encore.COM> jcallen@Encore.COM (Jerry Callen) writes: >In article <12391@pt.cs.cmu.edu> lindsay@gandalf.cs.cmu.edu (Donald Lindsay) writes: >>[It's also a way to stay ahead of the IBM RS/6000, which reportedly >>won't be multiprocessor until 1995 or 1996.] > >Hmmmmmm, reported by whom? IBM has been building multiprocessor mainframes >for a long time, and it would really surprise me if it takes them 4 years >to build an MP RS/6000. > >But then I don't work for IBM, so what do I know? > >-- Jerry Callen > jcallen@encore.com What is means is that if they SOLD multiprocessor rs6000s today the resulting speed would be so much higher - and the product so much more cost effective - than their mainframes that they simply refuse to do it. Doug McDonald
mash@mips.com (John Mashey) (03/19/91)
In article <4183@bnr-rsc.UUCP> tak@bnr-rsc.UUCP (Mike Takefman) writes: >In article <1991Mar16.073539.823@berlioz.nsc.com> my@tern.nsc.com (Michael Yip) writes: >I have a DG AViiON-100 on my desk. Even though it is a 16.67 MHz 88k, DG >insists on calling the box a 17 Mips machine. Xcalc gives me 115/4=28.75 >so I'm guessing that the marketing types are being a little more honest >and refering to a 33 MHz 88k as a 28.75 MIP processor, (unless they >are calling a 25MHz 88k a 29 MIP processor :-). Otherwise I have no info >on this machine. Dhrystone-mips. The "17-mips" AV100 gets something like 10-11 SPECinteger, 7-8 SPECfp. Also, although it is perfectly legal, and DG documents it correctly, something that doesn't show up in the unadorned numbers is the use of compilers chosen on a benchmark-by-benchmark basis, i.e., either 2 different C compilers are used for the 4 C benchmarks, or 2 different FORTRANs for the 6 FP benchmarks, or both. Again, this IS legal, but is why it's nice to get the full-disclosure pages... -- -john mashey DISCLAIMER: <generic disclaimer, I speak for me only, etc> UUCP: mash@mips.com OR {ames,decwrl,prls,pyramid}!mips!mash DDD: 408-524-7015, 524-8253 or (main number) 408-720-1700 USPS: MIPS Computer Systems MS 1/05, 930 E. Arques, Sunnyvale, CA 94086
jmaynard@thesis1.hsch.utexas.edu (Jay Maynard) (03/19/91)
In article <1991Mar18.200554.26908@ux1.cso.uiuc.edu> mcdonald@aries.scs.uiuc.edu (Doug McDonald) writes: >What is means is that if they SOLD multiprocessor rs6000s today the >resulting speed would be so much higher - and the product so much more >cost effective - than their mainframes that they simply refuse to do it. Horse hockey. They said that about the original PC/RT. They said that about the RS/6000. IBM is still selling mainframes. Know why? I/O, pure and simple. IBM mainframe customers care as much or more about raw I/O power as they do about CPU power. Remember that a large portion of mainframe-style DP is simply moving bytes from point A to point B, doing a minor amount of simple arithmetic, and moving the result to point C - in a loop from 1 to 5e+09. Let me know when an RS/6000 can run existing COBOL code, drive 20,000 terminals, and handle tens of disk requests to hundreds of disk drives while providing subsecond response time. I'll start worrying about the future of the IBM mainframe then. -- Jay Maynard, EMT-P, K5ZC, PP-ASEL | Never ascribe to malice that which can jmaynard@thesis1.hsch.utexas.edu | adequately be explained by stupidity. "You can even run GNUemacs under X-windows without paging if you allow about 32MB per user." -- Bill Davidsen "Oink!" -- me
linley@hpcuhe.cup.hp.com (Linley Gwennap) (03/19/91)
I saw the ad, but not the press release. Does anybody know if the
claims "over 100 MIPS" and "under $100,000" apply to the same system,
or is this one of these marketing things. ("Prices start at under
$100,000, but if you want the four-processor system...")
--Linley Gwennap
Hewlett-Packard Co.mash@mips.com (John Mashey) (03/19/91)
In article <4183@bnr-rsc.UUCP> tak@bnr-rsc.UUCP (Mike Takefman) writes: >In article <1991Mar16.073539.823@berlioz.nsc.com> my@tern.nsc.com (Michael Yip) writes: >| >|> MIPS ratings of multiprocessor machines aren't necessarily meaningful. >|> If I have one task I want to run, that 115 MIPS machine is only one-fourth >|> that speed. (It is a four-processor system.) >| ........deleted......... >|How fast is each processor anyway? Let's see ... 115/4 = 31 MIPS ... >|so the processor is 40MHz? (Is 88K a super-scaler? Not yet, right?) > >I have a DG AViiON-100 on my desk. Even though it is a 16.67 MHz 88k, DG >insists on calling the box a 17 Mips machine. Xcalc gives me 115/4=28.75 >so I'm guessing that the marketing types are being a little more honest >and refering to a 33 MHz 88k as a 28.75 MIP processor, (unless they >are calling a 25MHz 88k a 29 MIP processor :-). Otherwise I have no info >on this machine. EETimes says it's 4 CPUs at 25MHz. It also says that it uses 8 of the new 88204 CMMUs (which have 64KB each). I must admit surprise about the 88204: I hadn't thought it was out yet. It is, of course, rather desirable for the performance ofthis system, in that if you do the simulations, you find that 4 88100s & 8 88200s may often not give you much more performance than 2 88100s & 8 88200s, because the shared bus ends up getting thrashed by the insufficiently high hit rate from the 16KB 88200s. (This is for system running jobs that include OS time, i.e., substantive shared data.) The 4X bigger 88204s seem, on the surface, necessary to make a sensible 4-way 88K system, using the standard parts in standard arrangements. (I think this is why most of the 88K MP systems on the market have ended up being 2-way, i.e., 2 88100s + 4-8 88200s.) I note that the fastest DG AVIION for which SPEC numbers have been published, to my knowledge, is the 6200, yielding 15.3 on SPECinteger. The EETimes article had other interesting quotes, such as: "Motorola claimed that it has seven versions of the 88000 in design and will produce 300-Mips parts before 1995 with superscalar implementations." Does anybody know, for sure: a) Does DG, right now, have 88204s in there? b) Is there ANY performance data? [The 117-mips number is NOT data.] c) What does the memory system look like on this? -- -john mashey DISCLAIMER: <generic disclaimer, I speak for me only, etc> UUCP: mash@mips.com OR {ames,decwrl,prls,pyramid}!mips!mash DDD: 408-524-7015, 524-8253 or (main number) 408-720-1700 USPS: MIPS Computer Systems MS 1/05, 930 E. Arques, Sunnyvale, CA 94086
lewine@cheshirecat.rtp.dg.com (Donald Lewine) (03/19/91)
In article <1118@spim.mips.COM>, mash@mips.com (John Mashey) writes: |> Does anybody know, for sure: |> a) Does DG, right now, have 88204s in there? YES. They are not available in vast quantities, but we have enough to build a resonable number of machines. |> b) Is there ANY performance data? [The 117-mips number is NOT data.] YES. We have a large number of real benchmarks. We have been putting most of our effort into TPC-B, which is now about 100 transactions per second. SPECthruput is about 56. List price starts under $100K. |> c) What does the memory system look like on this? The 88K M-bus is interfaced to a bus which goes to memory boards. Each memory board supports up to 192 Mb and you can have up to 4 boards for 768 Mb total. -------------------------------------------------------------------- Donald A. Lewine (508) 870-9008 Voice Data General Corporation (508) 366-0750 FAX 4400 Computer Drive. MS D112A Westboro, MA 01580 U.S.A. uucp: uunet!dg!lewine Internet: lewine@cheshirecat.webo.dg.com
lewine@cheshirecat.rtp.dg.com (Donald Lewine) (03/21/91)
In article <32580003@hpcuhe.cup.hp.com>, linley@hpcuhe.cup.hp.com (Linley Gwennap) writes: |> I saw the ad, but not the press release. Does anybody know if the |> claims "over 100 MIPS" and "under $100,000" apply to the same system, |> or is this one of these marketing things. ("Prices start at under |> $100,000, but if you want the four-processor system...") |> |> --Linley Gwennap |> Hewlett-Packard Co. |> Yes they do. You can buy a four CPU system with 16Mb memory and 600 Mb of disk for under $100K. The system was designed to be a quad processor and only a quad processor. That produces much better price performance than a "scalable" design. -------------------------------------------------------------------- Donald A. Lewine (508) 870-9008 Voice Data General Corporation (508) 366-0750 FAX 4400 Computer Drive. MS D112A Westboro, MA 01580 U.S.A. uucp: uunet!dg!lewine Internet: lewine@cheshirecat.webo.dg.com
acha@CS.CMU.EDU (Anurag Acharya) (03/22/91)
In article <1991Mar21.150755.24744@webo.dg.com> lewine@cheshirecat.rtp.dg.com (Donald Lewine) writes:
Yes they do. You can buy a four CPU system with 16Mb memory and
600 Mb of disk for under $100K. The system was designed to be
a quad processor and only a quad processor. That produces much
better price performance than a "scalable" design.
How much do the increments in memory cost ? After all, a four proc machine
with only 16 Meg is not of much use. Especially since the processors are
fast and RISC.
A side question: what operating system does this machine run ?
anuragjonathan@cs.pitt.edu (Jonathan Eunice) (03/27/91)
Linley Gwennap writes: | I saw the ad, but not the press release. Does anybody know if the | claims "over 100 MIPS" and "under $100,000" apply to the same system, | or is this one of these marketing things. ("Prices start at under | $100,000, but if you want the four-processor system...") Prices start at about $35K. The 117 MIPS starts at $96K. I was unable to determine the "base configuration" for these prices from my DG material.
jonathan@cs.pitt.edu (Jonathan Eunice) (03/28/91)
A side question: what operating system does this machine run ? DG/UX, based on System V Release 4, with some excellent "commercial" enhancements For example, the kernel is multi-threaded, pre-emptible, and completely symmetric across processors. DG's scheduling is apparently quite good, too. File systems have dynamic resizing, disk spanning, disk mirroring, fast recovery/startup, dual-ported disk, and performance enhancements--competitive with Veritas work, and better than the IBM AIX Journalled File System. For networking: TCP/IP, NFS/ONC 4.0, UUCP are bundled, with the general array of X.25, AFP, Portable NetWare, OSI, and SNA links. For GUI: X11R4 and Motif 1.1. Contributed: GNU Emacs, gdb, TeX, SLIP, Kermit, troff, etc. Shells: Ksh, and csh and sh with tcsh/ksh-like line editing. Security: C2 and B1 support as options, rated-ness unclear. Conformance with: POSIX.1, FIPS 151-1, XPG3 Base Level, MNLS, 88open BCS, and OCS, and SVID 3. Misc: sysadm system administration front-end, good internationalization, too many other little features to mention. Missing: SVr4 calls for RFS, real-time scheduling, XENIX, and OPEN LOOK. BSD quota/setquota (replaced with other facility). I'm impressed. It looks to be botha "good UNIX" and a "good operating system," a combination too often available only by buying multiple products. If you want more info, DG has a pretty good little spec sheet/advert "DG/UX Release 5.4 For AViiON Systems" with an apparent publication number of 012-003568-03. I'm sure they'd be more than happy to send you a copy. jse
newton@gumby.cs.caltech.edu (Mike Newton) (03/28/91)
Re: which OS do the new AViiONs use...
[another posterm gave a run down of features..., this is a summary of usage]
Two things positive to say abut DG's OS's (I've been using them for ~1.5 yrs):
1:
DG/UX 4.31 is the least buggy unix i've ever dealt with (not to say it doesnt
have any bugs... I have a list of about 14 minor and 10 doc (very minor) bugs
that i've been meaning to send them. Only serious bug I know about is serial
driver on the very low end aviions). I've worked with Suns (but not OS 4.1),
UTS (Amdahl -- a close contender for second -- and that was a few years ago),
Vaxen (bsd), Aux,... but DG/UX is the nicest.
2: It is also one of the easiest platforms to port to (besides SunOS 4.1, where
someone else has already done the work for you). Porting procedure for almost
all code:
find any decl.s of 'sprintf' and make sure they are Posix (or BSD --
see second step) comliant. very often they arent.
if source is for BSD, add to CFLAGS '-D_BSD_SOURCE'
Again, there are obviously a few exceptions, but it usually is about that easy.
- mike (newton@gumby.cs.caltech.edu)
(ps: i'm not associated w/ DG... though i've been trying to become a
beta tester!)vhs@britesun.radig.de (Volker Herminghaus-Shirai) (03/29/91)
jmaynard@thesis1.hsch.utexas.edu (Jay Maynard) writes: [stuff deleted] >Let me know when an RS/6000 can run existing COBOL code, drive 20,000 >terminals, and handle tens of disk requests to hundreds of disk drives while >providing subsecond response time. I'll start worrying about the future of >the IBM mainframe then. And let ME know when any IBM Mainframe can drive 20,000 terminals while providing subsecond response time. In fact, let me know even when any such dino can drive 200 terminals with a subsecond response time. I've worked on these monsters long enough. Har, har, har. Volker (comments to me, flames to /dev/shredder) -- Volker Herminghaus-Shirai (vhs@britesun.radig.de) panic: 80x86! Trying to vomit...