sc@VLSI.CS.CMU.EDU (Siddhartha Chatterjee) (10/16/87)
Recent postings regarding specialized hardware support for various functions (eg, OS, sort) have been using the term "coprocessor". However, from the postings it appears that different people have different things in mind when they use the term. I'd like to know what precisely people mean when they say "coprocessor", and how they think it differs from other types of specialized processors, such as I/O processors. -- ---- ARPA: Siddhartha.Chatterjee@vlsi.cs.cmu.edu UUCP: {seismo,decvax,allegra}!rochester!cmu-cs-pt!cmu-cs-vlsi!sc ----
amit@umn-cs.UUCP (Neta Amit) (10/17/87)
sc@VLSI.CS.CMU.EDU (Siddhartha Chatterjee) writes: > I'd like to know what precisely people mean when > they say "coprocessor", and how they think it differs from other types > of specialized processors, such as I/O processors. I define coprocessors as general purpose processors assigned to perform specific tasks in parallel with the main processor. -- Neta Amit U of Minnesota CSci Arpanet: amit@umn-cs.cs.umn.edu
frazier@CS.UCLA.EDU (10/19/87)
>I define coprocessors as general purpose processors assigned to perform >specific tasks in parallel with the main processor. >-- > Neta Amit > U of Minnesota CSci > Arpanet: amit@umn-cs.cs.umn.edu Then what is the difference between a processor/coprocessor pair and two independent processors operating in parallel? I would define a coprocessor as a special purpose processor which either receives instructions from the "main" processor(s) or shares the main processor's instruction stream, but only executes "special" instructions (i.e. floating point coprocessors sample the instruction stream, operating only on the floating point operations). Thus, the difference between a coprocessor and an IO processor is that the IO processor is not involved in the instruction stream, but has it's own code for dealing with I/O which is independent of the code currently being executed by the "main" processor(s). $-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$ Greg Frazier Your feet are frozen to the floor... -more- CS dept., UCLA Internet: frazier@CS.UCLA.EDU UUCP: ...!{ihnp4,ucbvax,sdcrdcf,trwspp,randvax,ism780}!ucla-cs!frazier $-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$-$
henry@utzoo.UUCP (Henry Spencer) (10/20/87)
Fast rule of thumb: "coprocessor" means "it really should be part of the CPU, but we couldn't fit it on the chip, and Marketing decided to call it a coprocessor to make it sound sexy". -- PS/2: Yesterday's hardware today. | Henry Spencer @ U of Toronto Zoology OS/2: Yesterday's software tomorrow. | {allegra,ihnp4,decvax,utai}!utzoo!henry
franka@mmintl.UUCP (Frank Adams) (10/23/87)
[Not food] What is the difference between a coprocessor and an I/O processor? Nothing. An I/O processor is a particular kind of coprocessor. It is only the development history, with I/O processors being invented much earlier than other kinds, that leads us to think of them as fundamentally different. -- Frank Adams ihnp4!philabs!pwa-b!mmintl!franka Ashton-Tate 52 Oakland Ave North E. Hartford, CT 06108
kenton@abyss.zk3.dec.com (Jeff Kenton OSG/UEG) (03/27/91)
In article <10501@exodus.Eng.Sun.COM>, chased@rbbb.Eng.Sun.COM (David Chase) writes: |> In <2892@megatek.megatek.uucp> mark@megatek.UUCP (mark thompson) |> writes: |> |> >Whenever I read architecture manuals for (eg. the Moto 68000 series), |> >they invariably support several coprocessors. Also invariably, one of |> >those coprocessors is for floating point. |> ... |> >Has anyone tried to do something wonderful with one of the undedicated |> >coprocessors, examples of wonderful being I/O channel controllers or a |> >business instruction set? |> Didn't the announcement about the Motorola 88110 say something about a graphics unit? ----------------------------------------------------------------------------- == jeff kenton Consulting at kenton@decvax.dec.com == == (617) 894-4508 (603) 881-0011 == -----------------------------------------------------------------------------
mcdonald@aries.scs.uiuc.edu (Doug McDonald) (03/31/91)
>|> In <2892@megatek.megatek.uucp> mark@megatek.UUCP (mark thompson) >|> writes: >|> >|> >Whenever I read architecture manuals for (eg. the Moto 68000 series), >|> >they invariably support several coprocessors. Also invariably, one of >|> >those coprocessors is for floating point. >|> ... >|> >Has anyone tried to do something wonderful with one of the undedicated >|> >coprocessors, examples of wonderful being I/O channel controllers or a >|> >business instruction set? >|> > Certain LSI PDP-11 had (have?) business coprocessors that work with them. Certain other DEC LSI cpus (i.e. VAX) have the business instructions, or some of them, emulated in software, because it was faster :-). I doubt that that a business instruction set has quite the regularity of the major part of a FPU. Doug McDonald