R.Peel@ee.surrey.ac.uk (Roger Peel) (04/05/91)
Since the conference programme for TRANSPUTING '91 was prepared, two
of the invited speakers have been elected Fellows of the Royal Society
in the United Kingdom. Dr. David May and Professor Leslie Valiant
will be presenting their latest thoughts at TRANSPUTING '91 on the
topics which gained them this significant recognition.
The Royal Society in London was established in the days of Isaac Newton,
as a forum for scientific discussion. Ever since, it has elected a
limited number of Fellows, representing the most respected personalities
in all branches of science. Although there are currently very few Fellows
with a Computer Science interest, Dr. May and Professor Valliant join
Professor Tony Hoare (Oxford University Programming Research Group) and
Professor David Wallace (Edinburgh Parallel Computing Centre) who already
represent the transputer and parallel processing community.
Their full citations are :
Dr. M.D. May, FRS - distinguished for the invention, design and commercial
realisation of the transputer and of the parallel programming language
occam. He was personally responsible for turning the word 'transputer'
into a practical reality and an outstanding commercial success.
Prof. L.G. Valiant, FRS - distinguished for his many outstanding
contributions to theoretical computer science. His work includes
pioneering studies of computational complexity in computer learning and he
has devised a strategy for routing communications, establishing the
feasibility of efficient general-purpose parallel computers.
The synopses of the TRANSPUTING '91 invited papers follow. Don't forget
that TRANSPUTING '91 - by far the largest transputer conference yet run in
the U.S.A. - will also be hosting a full technical disclosure of the new
150 MIPs, 20 MFLOPs H1 transputer, introductory and advanced tutorials,
and 67 contributed papers covering industrial applications, research
directions in many subjects, hardware and software topics, to name a few.
Some 20 exhibitors will be demonstrating most of the hardware and software
products available to industrial and educational establishments, and there
will be non-commercial demonstrations and a large selection of posters.
TRANSPUTING '91 - conference from 23rd to 25th April, 1991
- tutorials on 22nd and 26th April, 1991
- at the Sunnyvale Hilton, California
Further details of this conference may be obtained from the sources listed
at the bottom of this message.
Special Invited Speakers
========================
Dr. David May, FRS
Manager, Transputer Architecture and Development, INMOS
"Towards General-Purpose Parallel Computers"
One of the major successes of Computer Science has been the development of
an efficient general purpose architecture for sequential computers. This
has allowed the construction of standard languages and portable software
which have been a primary factor in increasing the pervasiveness of the
sequential computer. One of the major aims of current research is to
achieve a similar success for general purpose parallel computers.
A wide range of specialised concurrent processing systems have been
constructed from transputers. They are used in applications such as
communications, real-time control, image processing, robotics, databases,
graphics and animation. Experience with existing transputer-based
machines - and theoretical considerations - suggest several promising
approaches to the architecture of scalable general purpose concurrent
computers. An important requirement is a communications architecture
supporting system-wide communication and memory access. This will allow
more flexible - and more portable - programming styles. Further
developments in architecture and programming techniques will open the way
to portable parallel software - and make general purpose parallel
computing a reality.
David May graduated from Cambridge University in 1972 with a degree in
Computer Science. He then worked at Warwick University on artificial
intelligence and robotics. This experience gave rise to a long-term
interest in concurrent computer architectures and concurrent programming.
In 1979, he joined INMOS to design VLSI components for concurrent
systems. He was responsible for the design of the occam language and the
architecture of the INMOS transputer.
Over the past 15 years, David May has delivered numerous lectures and
seminars, and has published about 45 papers and 15 patents. In 1989, he
was appointed Visiting Professor of Engineering Design at Oxford
University and in 1990 he received an honorary D.Sc. from Southampton
University for his contributions to the development of parallel
computing.
David May is currently working at INMOS on the architecture of a new
product range for introduction in 1994. His interests include concurrent
computer architecture, programming languages, silicon compilation and the
use of formal methods in VLSI designs.
Professor Leslie Valiant
Harvard University
"Bulk-synchrony: a bridging model for parallel computation"
The success of the Von Neumann model of sequential computation is
attributed to the fact that it is an efficient bridge between software and
hardware. This paper argues that an analogous bridge between software and
hardware is required for parallel computation if it is to become more
widely used, introduces the bulk-synchronous parallel model as a candidate
for this role, and supports the suggestion by giving a number of results
that quantify its efficiency.
Professor Valiant is currently Gordon McKay Professor of Computer Science
and Applied Mathematics at Harvard University. His current research
interests are computational complexity, machine learning, and the theory
of parallel algorithms and architectures. In 1986 he received the
Navanlinna prize for theory of information processing from the
International Mathematical Union. He was educated at Cambridge
University, at Imperial College, London, and at Warwick University, and he
has taught at Carnegie-Mellon, Leeds and Edinburgh Universities.
Mr. Riichirou Take and Mr. Yasuo Noguchi
Researchers, Artificial Intelligence Laboratory, Fujitsu Laboratories Ltd.
"An architecture for parallel database computing"
The paper proposes an MIMD computer aimed at database processing and
general purpose applications. An experimental system has been made using
32 T800s as processing nodes, and 32 for Dragon Net, a binary n-cube
structured network which can optimally process all-node-to-all-node
communication based on a simple rule.
Mr. Take and Mr. Noguchi are researching into concurrency control for
distributed database management systems, and parallel architecture and
algorithms for speeding up database operations. Mr. Take has a degree in
Mathematical Engineering and Information Physics from the University of
Tokyo. Mr. Noguchi has a Masters degree in Pharmaceutical Science from
the University of Tokyo.
Mr. Jonah McLeod
Editor, Electronics
"An industry-wide perspective on parallel and multi- processing"
Jonah McLeod has twenty years of experience in the Electronic Industry.
He has been most recently promoted to the top position, Editor, of
Electronics magazine. He has been with Electronics and Electronic Design
since 1979, and has written extensively on computers, workstations,
software, computer-aided engineering, test and measurement and computer
peripherals; indeed, the whole spectrum of electronic equipment. He served
for a brief period as Account Executive at Regis McKenna P.R, where he
managed the Apple Computer and Intel Corp. accounts. Prior to this, he
served as west coast editor of Computer Design. He has written several
books on computers, computer peripherals and computer-aided design. He
has a Bachelor of Science degree from the University of Texas.
Mr. Dennis G. Shea
Modular Microsystems Group Manager, IBM T.J. Watson Research Center
"Victor V256 revisited : an update on parallel applications and
activity at IBM Research"
Much activity continues today with experimentation on a variety of
parallel architectures in trying to achieve the high performance
potentials promised in the solution of significant applications. This
talk begins with a brief overview of some of the prototypes available at
IBM Research for experimentation, such as GF11, an SIMD machine and RP3, a
MIMD shared memory machine.
The focus of the talk will be on Victor, a family of partitionable
multiprocessors that provide researchers with a platform for
experimentation with a MIMD distributed memory architecture. The machines
range in size from a V16 workstation to V256, a two hundred and fifty-six
node partitionable message passing machine with one gigabyte of
distributed main storage and ten gigabytes of distributed disk I/O. One
tool that will be demonstrated, which has proved very useful in the
development of applications on V256, is the Victor monitor which provides a
continuous display of system activity to the user and is non-intrusive to
the application. Multiple programming environments and kernels exist on
Victor. One that is discussed is that of E-Kernel, an embedded kernel
written in occam that supports mapping of higher-dimensional mesh or torus
graphs onto the Victor network.
A summary of the application work will be presented, covering a variety of
scientific and engineering topics, such as VLSI circuit and logic fault
simulation, computational fluid dynamics, Quantum Monte Carlo simulations
and environmental modelling. The talk concludes by looking at future
directions in the development of large parallel distributed memory
machines.
Dennis G. Shea is manager of Modular Microsystems, "Home of Victor", at
the IBM T.J. Watson Research Center. The research focus of Modular
Microsystems is in issues relating to the design and development of
high-performance distributed memory parallel processors and their use in
solving real applications. He joined IBM Boca Raton in 1979 with a B.S.
and M.E. in Electrical Engineering from Rensselaer Polytechnic Institute.
While at Boca Raton, he worked in the areas of LSI Component Engineering
and New Systems Advanced Technology and completed a Masters degree in
Computer Systems at Florida Atlantic University. He left Boca via an IBM
Resident Study Fellowship and is a Ph.D. candidate in the Department of
Computer and Information Science at the University of Pennsylvania. He is
a member of Tau Beta Pi and Eta Kappa Nu.
H1 TRANSPUTER DISCLOSURE
Ian Pearson, Director of Technology, INMOS
Wednesday afternoon's session will feature a complete technical disclosure
of INMOS' next generation transputer, codenamed H1.
The key features of H1 are a high performance pipelined superscalar
processor and major support for multiprocessing applications. Peak
performance will be more than 150 MIPS and 20 MFLOPS. INMOS, a member of
the SGS-THOMSON Microelectronics group, is the recognized leader in
parallel and multi- processing, and H1 represents a major advancement in
parallel computing and high speed communications.
The transputer architecture is unique in providing hardware support for
process scheduling and specific instructions for interprocess
communication. As the computational loads on embedded processors
increase, the ability to produce scalable multiprocessor systems is
crucial. H1 represents a significant advance in the transputer's already
proven capabilities in parallel and multiprocessing.
The design goals for H1 were to enhance the transputer's position as the
premier multiprocessing microprocessor, and to establish a new standard in
single processor performance, while maintaining compatibility with
existing transputer products. This session will disclose the means by
which these have been achieved, and time has been scheduled for Mr.
Pearson to field questions from the audience.
Having first qualified in Applied Physics, Ian Pearson spent 3 years
researching in the field of high energy physics and solid state
electronics. He spent three years working with Philips Semiconductor and
Racal Ltd. in semiconductor device design and modelling, and spent a
further 10 years as a VLSI designer and consultant working with a number
of U.S. and Japanese semiconductor companies. He first joined INMOS in
1983 as Director of Silicon Systems, establishing the current DSP business
and taking responsibility as Director of Microcomputer Operations for the
launch and marketing of the transputer. Ian left in 1987 to take up a
senior management position with Niche Data Systems Inc., returning to
INMOS in 1989 as director of Systems Products for the new 'iq systems'
business. He is now INMOS's Technical Director.
Further Details
===============
For additional program / tutorial information, call Executive Meeting
Management in the U.S.A. at 1-800-828-7494 or (717) 731 9295. A message
recorder and a facsimile machine are also available 24 hours a day on the
second number.
Alternatively, write to :
Executive Meeting Management,
PO Box 434,
Camp Hill,
PA 17001
USA
Full details may be requested by electronic mail from :
Dyke Stiles ( stiles@cc.usu.edu )
or myself, Roger Peel ( r.peel@ee.surrey.ac.uk )
Alternatively, call the chairman or secretary of your national Transputer
or occam user group.
-----------------------------------------------------------------------------
Roger M.A. Peel
Department of Electronic and Phone : +44 483 509284 (0483 from UK)
Electrical Engineering Fax : +44 483 34139
University of Surrey Telex : 859331
Guildford JANET : R.Peel@uk.ac.surrey.ee
Surrey GU2 5XH UUCP : ...mcsun!ukc!ee.surrey.ac.uk!R.Peel
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