ge@dbf.kun.nl (Ge' Weijers) (04/03/91)
I'd like to know in which publication the SPARC instruction set is documented. This to port our functional language compiler from the MC680x0 to a SPARC-based system. A ISBN number or Sun order number would be useful. Ge' Weijers, KUN Nijmegen. -- Ge' Weijers Internet/UUCP: ge@cs.kun.nl Faculty of Mathematics and Computer Science, (uunet.uu.net!cs.kun.nl!ge) University of Nijmegen, Toernooiveld 1 6525 ED Nijmegen, the Netherlands tel. +3180652483 (UTC-2)
rauscher@remus.rutgers.edu (Rich Rauscher) (04/04/91)
>I'd like to know in which publication the SPARC instruction set is documented.
On a similar note, if anybody knows where I can get the specs for the
MMU that Sun has implemented with the SPARC, I would be very grateful.
-Rich
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rauscher@rutgers.edu RPO 5997 PO 5063, New Brunswick, NJ 08903
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{backbone site}!rutgers!rauscher (2B | not (2B)) <=> TRUEmslater@cup.portal.com (Michael Z Slater) (04/06/91)
>>I'd like to know in which publication the SPARC instruction set is documented. > >On a similar note, if anybody knows where I can get the specs for the >MMU that Sun has implemented with the SPARC, I would be very grateful. The answer to both questions is the SPARC Architecture manual, version 8, which includes the MMU spec. It is published by SPARC International, 535 Middlefield Rd., Suite 210, Menlo Park, CA 94025; 415/321-8692. Michael Slater, MIcroprocessor Report
mslater@cup.portal.com (Michael Z Slater) (04/06/91)
>>I'd like to know in which publication the SPARC instruction set is documented. > >On a similar note, if anybody knows where I can get the specs for the >MMU that Sun has implemented with the SPARC, I would be very grateful. The answer to both questions is the SPARC Architecture manual, version 8, which includes the MMU spec. It is published by SPARC International, 535 Middlefield Rd., Suite 210, Menlo Park, CA 94025; 415/321-8692. >>> Whoops, I need to correct my own posting. This manual documents the "reference MMU", which is not the MMU Sun has used so far. I don't know where to get a reference on Sun's proprietary MMU. Michael Slater, MIcroprocessor Report
torek@elf.ee.lbl.gov (Chris Torek) (04/06/91)
In article <40941@cup.portal.com> mslater@cup.portal.com (Michael Z Slater) writes: >I don't know where to get a reference on Sun's proprietary MMU. As far as I know, you cannot. There are some lovely pictures in the SunOS 4.0 manual sets, and if you read the Sprite source code you can figure out the rest. The MMU is actually quite straightforward: it consists of some number (128 in the SS1, 256 in the SS2) of things Sun call `PMEGs', each of which is just a row of some number (64 in the SS1, probably the same in the SS2) of PTEs. In addition there are some number (8 on the SS1) of `segment tables'. Address translation is done as: vseg = SEGMENT_NUMBER(va); pmeg = segment_table[context_register][vseg]; pte = pmeg_table[pmeg][PAGE_NUMBER(va)]; Here SEGMENT_NUMBER and PAGE_NUMBER are just `pull some bits out of the address'---the top 14 and the middle 6 respectively, on the SS1. Actually the virtual segment number is only 12 bits; the top 3 bits of all virtual addresses must be all 0 or all 1, and the top 2 bits are otherwise ignored. The segment_table and pmeg_table arrays are really just MMU SRAM treated as if it were two separate two-dimensional arrays. -- In-Real-Life: Chris Torek, Lawrence Berkeley Lab CSE/EE (+1 415 486 5427) Berkeley, CA Domain: torek@ee.lbl.gov