ldo@waikato.ac.nz (Lawrence D'Oliveiro, Waikato University) (04/15/91)
What sort of looping instructions do different processors have? I used to think it was more trouble than it was worth to use *any* kind of "subtract-one-and-branch" instruction to implement a Pascal-style for-loop correctly, until I saw some code which showed me the *right* way to use the DBRA instruction on a 68000. I was impressed! This instruction lets you handle an initial loop count of zero without a separate check. Do other architectures have loop instructions that are at least as well-designed? Lawrence D'Oliveiro fone: +64-71-562-889 Computer Services Dept fax: +64-71-384-066 University of Waikato electric mail: ldo@waikato.ac.nz Hamilton, New Zealand 37^ 47' 26" S, 175^ 19' 7" E, GMT+12:00 To someone with a hammer and a screwdriver, every problem looks like a nail with threads.
jdg@cs.man.ac.uk (Jim Garside) (04/16/91)
[ ldo@waikato.ac.nz (Lawrence D'Oliveiro, Waikato University) writes:- ] > ... I saw some code which showed me the *right* > way to use the DBRA instruction on a 68000. I was impressed! This > instruction lets you handle an initial loop count of zero without a > separate check. My question: what is the *right* way to use a DBcc instruction and (why does it not have deleterious effects on prefetching)? Seriously: 680x0 DBcc Decrement a (16-bit) register and terminate if it becomes FFFF or if a specified condition is met. 80x86 LOOP Decrement (16-bit) CX register and terminate if 0000 Z80 DJNZ Decrement (8-bit) B register and terminate if 00 Transputer LEND Increment one memory location (16-/32-bit), decrement an adjacent one and terminate if the latter is 0000(0000) ... Jim Garside jdg@cs.man.ac.uk