[comp.arch] Optical Interconnect could be rather easy!

woolstar@nntp-server.caltech.edu (John D. Woolverton) (04/10/91)

lindsay@gandalf.cs.cmu.edu (Donald Lindsay) writes:
>But how to attach a fiber to a chip?

>There are several answers. I think one group made a notch in the edge
>of a chip, so that a fiber in the notch would be properly aligned
>with an edge-emitting diode.  Now that we can make arrays of
>face-emitting lasers, there's a simpler answer: just epoxy the fiber
>end onto the chip. One of the lasers will happen to be on the fiber's
>optical axis, and one is enough.
>
> [more interesting ideas]
>
> D.C.Lindsay .. temporarily at Carnegie Mellon Robotics

   If lasers are fairly cheap (ie 1,000 cost the same as one),
have the chips self aligning, then we can program the chip
to configure itself.

   This idea comes from my reading on the JTEG proposal.
Under the JTEG proposal, each chip will have four testing pins:
a clock, directional signal, pass in, and pass out.  (I think)
The idea, is to connect up every internal pad through a shift 
register, and connect up all the chips on a board, so that you 
can check the connections between every chip on the board
from one simple connector.  This also makes testing easier
than a bed of nails.

   For optical chips will still need a few metal pins 
for power and ground, so we could keep the JTEG functionality
in metal as well.  Then we put about 10 lasers in a row for
each output, and about ten receptors for inputs, connect up the
chips (with lots of tolerance), and use the JTEG to test which
output/receptors are connected.  The have some fuse mechinism
to enable the proper laser(s), and the board is wired.
   You could even use a scheme like this to modify the pin
out of chips to suit your need, or have extra lines to be
used incase a fiber is bad.

   Doing board-to-board connections could be a little 
trickier.  Maybe we'll have dual-port laser drivers on
each side of a connector.

	woolstar@cobalt.caltech.edu
	John D. Woolverton, Engineer

peng@hpsciz.sc.hp.com (Peng Lee) (04/15/91)

/ hpsciz:comp.arch / davidsen@crdos1.crd.ge.COM (Wm E Davidsen Jr) /  5:55 am  Apr 11, 1991 /
In article <510001@hpsciz.sc.hp.com> peng@hpsciz.sc.hp.com (Peng Lee) writes:

| 	On chip A, one can use the liquid crystal to modulate the light.  On
| chip B, one can use the CCD to detect the IR (a very bad idea, someone please
| point out a different way to do it.).

  Why would you do this rather than use an IR LED on the sender chip,
avoiding having to pipe the light through multiple chips? With only a
few levels of ship there would be a power disipation saving, but with
the cube you describe later in your posting I would think the loss of
realestate to windows would be worse than the heat problem.

  Consider this a question rather than a criticism, I can't even
ballpark the tradeoffs in my head, so I don't imply in any way you're
wrong.
-- 
bill davidsen	(davidsen@crdos1.crd.GE.COM -or- uunet!crdgw1!crdos1!davidsen)
        "Most of the VAX instructions are in microcode,
         but halt and no-op are in hardware for efficiency"
----------

peng@hpsciz.sc.hp.com (Peng Lee) (04/15/91)

> / hpsciz:comp.arch / davidsen@crdos1.crd.ge.COM (Wm E Davidsen Jr) /  5:55 am  Apr 11, 1991 /
> In article <510001@hpsciz.sc.hp.com> peng@hpsciz.sc.hp.com (Peng Lee) writes:
> 
> | 	On chip A, one can use the liquid crystal to modulate the light.  On
> | chip B, one can use the CCD to detect the IR (a very bad idea, someone please
> | point out a different way to do it.).
> 
>   Why would you do this rather than use an IR LED on the sender chip,
> avoiding having to pipe the light through multiple chips? With only a
> few levels of ship there would be a power disipation saving, but with
> the cube you describe later in your posting I would think the loss of
> realestate to windows would be worse than the heat problem.

	Theoretically, since it's the energy level of the wavelength is less
then the energy level of the silicon bandgap.  The silicon dice will not absorb
any of the light energy at all. (At lease that's what I remember from school.)
So, I don't think there will be a heat problem from the laser.  And we're also
talking about micro-watt or (nano-watt) laser in 5x5 micron^2 spot, right?

	Well, I don't understand the fabrication process of IR LED, but what I
do know is that the LC (or some other light modulating materials ) can be
easily fabricated (layered?) on chip.

	The hard part maybe the detector.  People told me CCD is as thick as 25
micron.  A considerable much more processes have to apply to the dice.  With
the promise of Killer-Nano, someone will find a better way to solve the
problem.  One possible solution is putting something (Let me find my Quantum
Mechanic book) in the Si to narrow the bandgap or to create a new or a smaller
bandgap.  If the bandgap is smaller then the energy level of the light, the
light can excite the electrons from the valence(sp?) band to the conducting
band.  And the light will be detected once the electron is on the conducting
band.  Someone with the stronger QM background can verify this to see if it's
theoretically possible.

> 
>   Consider this a question rather than a criticism, I can't even
> ballpark the tradeoffs in my head, so I don't imply in any way you're
> wrong.

	I don't mind it a bit.  There are a lot more people in the net that's
much more qualify than me in this area.  (Hint: My graduate major is CS.)

-Peng
p.s.  I want to get an kill-nano (76 GIPS dragon) inside my watch by 94.

peter@ficc.ferranti.com (peter da silva) (04/16/91)

Comments about the band-gap of the silicon letting you choose wavelengths
for which the chip material is transpernt to the interconnect beg one question:
what about the metallization? You still need power, and the rails are plain
old aluminum: won't they be opaque to the IR?
-- 
Peter da Silva.  `-_-'  peter@ferranti.com
+1 713 274 5180.  'U`  "Have you hugged your wolf today?"