davidb@inmos.co.uk (David Boreham) (05/05/91)
Further to my reply to Colin's comments about the number of instructions executed per cycle, I dug out the section from the manual: THE PIPELINE ------------ Instructions are executed in a five stage pipeline: the first can fetch two local variables; the second can perform two address calculations, for accessing non-local or subscripted variables; the third stage can load two non-local variables; the next can perform an ALU or FPU operation; and the final stage can do a conditional jump or write. A conventional pipeline is designed to allow several instructions to be executed simultaneously; different parts of each instruction being handled in different stages of the pipeline. In order to allow multiple instructions to be *issued* per cycle (as well as multiple instructions being executed in each cycle) the IMS T9000 does not simply send a sequence of instructions through the pipeline but has hardware which assembles groups of instructions from the instruction stream. These groups are chosen to make the best use of the available hardware and one group can be sent through the pipeline every cycle. Instructions are put into groups in the order that the arrive at the CPU; dependencies within the group are handled automatically by the pipeline. The grouper can ge thought of as a hardware optimiser; it recognises commonly occurring code sequences that the processor can execute effectively. The design of the grouping mechanism and the pipeline is based on anaylsis of the code typically generated by high level language compilers. (reproduced from ``The T9000 Transputer Products Overview Manual'') David Boreham, INMOS Limited | mail(uk): davidb@inmos.co.uk or ukc!inmos!davidb Bristol, England | (us): uunet!inmos.com!davidb +44 454 616616 ex 547 | Internet: davidb@inmos.com
adm@otter.hpl.hp.com (Alan Marshall) (05/10/91)
> (reproduced from ``The T9000 Transputer Products Overview Manual'')
David,
Can you tell us when this interesting document will be generally available?
Alan Marshall
HPLabs Bristol