lengewit@balduin.informatik.uni-dortmund.de (Peter Lengewitz) (01/10/91)
10.1.91 Hello. In the future i will have to work on the integration of hardware description languages with performance evaluation tools to enable performance evaluation of hardware designs specified by using VHDL. I want to find (if possible) a mapping from VHDL to HI-SLANG. HI-SLANG is the language of the hierarchical performance evaluation tool HIT. So i am looking for any informations on the following topics: - VHDL (introduction, books, examples, etc.) - Performance Evaluation of hardware designs - Contact to persons, working on the same topics If you have such informations, please post it, or email it to me. Thanks in advance. Peter Lengewitz (University of Dortmund / LS IV) ----------------------------------------------------------------- E-Mail: lengewit@else.informatik.uni-dortmund.de
savel@hoss.unl.edu (Bharat P. Savel) (01/13/91)
In article <YIH.91Jan11142235@albion.utah.edu> yih%albion.utah.edu@cs.utah.edu (Benny Yih) writes: > > Two books that were suggested to me by someone are: >The VHDL Handbook by David R Coelho (Vantage Analysis Systems, Inc) > 1989 ISBN 0-7923-9031-8, 415 pp, ~$65. nice book; not for beginers; kind of a resource book; teaches better programming skills etc; a bible for multi-valued-logic scenarios; talks about registers ALU(??); > >VHDL: Hardware Description and Design by Roger Lipsett, Carl F Schaeter & Cary > Ussery (intermetrics, Inc) > 1989 ISBN 0-7923-9030-X, 320pp, ~$55. true; is better than the VHDL tutorial by Intermetrics; the first 4-6 chapters are very in depth; after that the book gets vague; doesn't discuss 'block' and 'configuration' properely/at all; still explains the fundmentals of VHDL; maybe the second edition (if one is in works) will be better; there is a third book: 'chip level modelling with VHDL' by Armstrong; a condensed version of Book 2; not as a good book like the #2, but gives a detailed example of a chip with all components at a system level; this example serves a better purpose teaching the intricasies of VHDL than the book itself; above all, all these books teach VHDL, none really show how to use VHDL in a layman's language; worse still, simulation of an entity is explained (kind of) only in #1; it is shown in #2; NONE of the books mention how to compile a entity ( like vhdl [filename]; THEN mg [filename]; THEN ......) they assume that the manuals take care of that, the manuals themselves are not well documented ( i have had atleast 2 other persons admitting that) even more the VHDL hotline ( 1-800 number) is not manned; so unless a good book comes out filling all the deficienciesof these 3 books, i would just recommend #1; it is a resource atleast; -- -------------------------------------------------------------------------------- Bharat P. Savel EE Dept. E-mail : savel@hoss.unl.edu Univ of Nebraska-Lincoln Ph : (402) 477-9857
craig@synopsys.com (Craig Cochran) (01/15/91)
In article <1991Jan12.174847.1116@hoss.unl.edu> savel@hoss.unl.edu (Bharat P. Savel) writes: > >above all, all these books teach VHDL, none really show how to use VHDL in >a layman's language; worse still, simulation of an entity is explained >(kind of) only in #1; it is shown in #2; NONE of the books mention how to >compile a entity ( like vhdl [filename]; THEN mg [filename]; THEN ......) >they assume that the manuals take care of that, the manuals themselves are >not well documented ( i have had atleast 2 other persons admitting that) >even more the VHDL hotline ( 1-800 number) is not manned; > The steps taken to simulate a configuration are not part of the IEEE 1076 specification (or any other industry standard), and therefore will vary wildly between products from different companies. From your description above, it sounds as if you are using the Intermetrics toolset, which, prior to being acquired by Valid, was command-line based. By contrast, an example is Vantage, who provides a graphical interface with no command-line compiler or model generator. Thus, these steps will have to be excluded from any generic book on VHDL modelling, as they are not applicable to VHDL users at large. -- Craig Cochran Product Marketing Manager email: craig@synopsys.com Synopsys, Inc. voice: (415)962-7723