andy@cged.co.uk (Andy Boswell) (01/31/91)
vansoest@cs.utwente.nl (Dick van Soest) wrote: >2. If I get a VHDL description of a system, can I recognize the > physical hierarchical construction of the system, like: craig@synopsys.com (Craig Cochran) replied: > Through component instantiation, any hierarchy can be implemented in VHDL. > And using configurations, multiple hierarchies of a given design can be used. > For instance, you may have one configuration which uses an architecture with > hierarchy representing the functionality of the design, and another > configuration which uses an architecture with hierarchy representing the > so-called field-replacable components of the design. Both represent the > design accurately, but break down the external requirements of each module > differently. > This multiple configuration capability is a unique power of VHDL. The ELLA HDL also supports multiple configurations of a design. ELLA is best known in Europe and the Far East. The strengths of ELLA and VHDL are very complementary: although both are HDLs, the languages address different activities. ELLA is a purpose-built hardware design system for ASICs. We believe that VHDL, because of its generality and primary objectives, offers an excellent medium for documentation, deliverables, modelling and tool interworking. ELLA, however, offers more for ASIC design. ELLA and VHDL differ in the way in which they support multiple configuration: configuration is provided directly in the VHDL language, while in ELLA the configuration is made externally within a design support environment. The ELLA approach partitions the design into "contexts" which may be integrated together in multiple configurations. There are some advantages in the separation of configuration from the language itself: 1 The hardware description is free of configuration data, and therefore simpler. 2 The functional hierarchy, implicit in the hierarchy of the language modules, may be augmented by a "coarser grain" context hierachy. These two hierarchies may be used to express different aspects of the partitioning of the design. Also, for any particular configuration of a large design, the coarser grain of the context hierarchy is more accessible than the complex hierarchy of language modules, and may be visually traversed with a graphics user interface. 3 The configuration may be altered using dynamic support environment commands without recompiling design modules; using a graphics interface, the configuration may be altered entirely by icon and mouse operations. I believe that the language based configurations in VHDL are statically defined at compile time, requiring recompilation to change the configuration. 4 Contexts may be used to hide lower-level data, for instance library functions. In an ASIC design flow using ELLA, the support environment is a crucial tool in the design process. The ability to have multiple configurations supports the key processes of hierarchic partitioning and incremental transformation of behaviour to structure, which the designer undertakes before logic synthesis. Point 2, above, addresses Dick van Soest's requirement for an expression of "the physical hierarchical construction of the system". In ELLA, the context system could be used to express this hierarchy independently of the functional hierarchy of the individual language modules. Though what Craig says about VHDL with respect to PCBs is equally true of ELLA: > ... , there is no limitation which keeps VHDL from being > used to describe PCBs or system-level architectures. In current practice, > I don't believe that many people are using VHDL to desribe PCBs. Andy Boswell Principal Application Engineer Tel: +44 225 482744 Computer General Electronic Design Limited Fax: +44 225 442751 The New Church, Henry Street, Bath, BA1 1JR, U.K. email: andy@cged.co.uk