rayv@revenge.oakhill.uucp (Ray Voith) (03/19/91)
Here is my version of a VHDL pretty printer for unix.
#---(cut here)-------------------------------------------------
#
# @(#)vgrindefs.src 1.0 03-19-91
#
# to use, issue the command in unix:
# vgrind -t -lvhdl -d <path>/vgrindefs <file> | lpr -t
#
# where this file is located at <path>/vgrindefs
#
# or set up an alias as follows:
# alias lprvh 'vgrind -t -lvhdl -d <path>/vgrindefs \!* | lpr -t'
#
# and then issue:
#
# lprvh <file>
#
# comments/fixes, etc. to:
#
# __________________________________________________________________________
# / ***** \
# |Ray Voith * * |
# | Semiconductor Products Sector (SPS) * ********* |
# | Semiconductor Systems Design Technology (SSDT) ****** * |
# |Motorola, Inc. * OAKHILL * |
# |MS OE321 * * * .+ * |
# |6501 William Cannon Drive West ** * * |
# |Austin, TX 78735 * * |
# | rayv@revenge.sps.mot.com ** |
# | (!cs.utexas.edu!oakhill!revenge!rayv) |
# |(512) 891-2265 (891-2AOK)(891-BANK) fax 891-3161 |
# |--------------------------------------------------------------------------|
# | Vengeance is Mine saith the Lord |
# | but revenge is mine saith the Voith |
# \________-------_____________________-----_________________________________/
#
vhdl|vhd:\
:pb=(^\d?(procedure|function)\d\p\d|\(|;|\:):\
:bb=\d(begin|block|body|case|component|configuration\
|entity|for|if|loop|package|process|while|with)\d:\
:be=\dend:\
:cb=--:ce=$:\
:oc:\
:kw=abs access after alias all and architecture array assert attribute\
begin block body buffer bus\
case component configuration constant\
disconnect downto\
else elsif end entity exit\
file for function\
generate generic guarded\
if in inout is\
label library linkage loop\
map mod\
nand new next nor not null\
of on open or others out\
package port procedure process\
range record register rem report return reverse_range\
select severity signal subtype\
then to transport type\
units until use\
variable\
wait when while with\
xor: