nigelw@cs.man.ac.uk (Nigel Whitaker) (04/16/91)
Hello VHDL writers, Here, at Manchester, we are working on supporting VHDL on the Manchester Simulation Engine (MANSE). The architecture incorporates multiple microprocessors for supporting component evaluation. We currently have fairly fast/wide data paths for incoming and outgoing events and for storing component state. However we were wondering how to perform VHDL TEXTIO. A number of possible implementation strategies are open to us, depending upon the type of input/output which will be performed. However, we don't have much experience of what TEXTIO is practically used for. For example, is it used to initialise data structures at the start of simulation, for writing results to a file for review/postprocessing after simulation, or do you use something more complicated, interprocess/entity communication for example? Does TEXTIO control the conditonal execution of VHDL code? It would help is greatly if you could take a little time to reply to this message and indicate any uses you make of TEXTIO (or possibly indicate that you don't use it at all). Please indicate the expected usage patterns, the approximate sizes of any files produced and any other info you might think would help us. If you are interested in the answers please also email and I will summarise the answers we get and our conclusions. Many thanks, Nigel Whitaker -- ------------------------------------------------------------------------------- Nigel Whitaker, Dept. of Computer Science, Univ. of Manchester, Manchester, UK Tel: (061) 275 6270 Fax: (061) 275 6280 EMAIL: nigelw@cs.man.ac.uk