rmr@inmet.inmet.com (05/01/91)
Valid Logic provides such a capability with their GED Schematic Capture package. Your local Valid rep should be able to help you out with specifics. The Valid capability generates a very readable structural VHDL description from a GED schematic -- it was not clear from your mail what direction, GED-to-VHDL or VHDL-to-GED, you wanted. Rachael Rusting Intermetrics, Inc. rmr@inmet.inmet.com