[comp.lang.vhdl] wait statement in procedures

rose@SRC.Honeywell.COM (Fred Rose) (05/10/91)

This is a question for you tool builders out there.

I am building a model where it will be very nice to have procedures with wait
statements in them. While that is certainly legal, I am concerned about
performance. I recall a year or so ago at VUG that, someone from HHB stated
that was a very bad idea from a performance standpoint. Any clues or
suggestions as to how big a hit that it would be? I know the best way to check
is to benchmark it myself, but I'd thought I'd check the net first.

Thanks!

---------------------------------------------------------
Fred Rose                            
Honeywell Systems and Research Center
MS-2100                    e-mail: rose@src.honeywell.com            
3660 Technology Dr.        Phone : (612) 782-7106
Minneapolis, MN 55418      Fax   : (612) 782-7438