[comp.lang.vhdl] VHDL benchmark cases needed

sganguly@rodan.acs.syr.edu (Dr. Shantanu Ganguly) (06/07/91)

Do any VHDL benchmark circuits exist that one could use to
test the performance of a VHDL simulator ?
(something on the lines of Deutsch's Difficult Example for Channels
 or the ISCAS examples)

Please send mail to sganguly@cat.syr.edu, I will summarize.

Thanks, 

Shantanu Ganguly
Syracuse University