jcs@crash.cts.com (John Schultz) (05/31/91)
In <22035@cbmvax.commodore.com> daveh@cbmvax.commodore.com (Dave Haynie) writes: >In article <1991May29.212315.27847@nntp-server.caltech.edu> nygardm@nntp-server.caltech.edu (Michael T. Nygard) writes: >>I've been looking at some numbers on the board. Here's what I came up with. >>Without using a CLUT (yuk.), assuming 80ns RAM, 1024x1024x24 resolution. >>1/(1024*1024*24*60) = .66227 ns/bit. >>(80 ns/cycle) / (.66227 ns/bit) = 120.8 bits/cycle [stuff deleted] >VRAM is likely what ya want on a board like that. A VRAM has two ports, the >normal RAS/CAS random access port, and a serial shift register port. You can >run a wacky cycle that, rather than pull a page or static mode trick, will >download a whole row into the shift register. You can now proceed to shift >that data out quickly, while at the same time using the random access port for >CPU/GPU/whatever things. Yes, VRAM is a must. You also have to find a suitable RAMDAC (similar to a Brooktree Bt473). Further, you'll need to communicate between the i860 and the host. For maximum throughput you'll need dual port ram accessible by the Amiga and the i860. The 64-bit external data bus will also make things even more expensive (if you want to utilize the full power here). The 7Mhz 16-bit bus of Zorro-II won't do for speed- Zorro-III is a must (The market will be limited to A3000s and its successors). Designing and building the hardware is the easy part (debugging it is a little more work). Once the hardware is debugged, you'll need to write software to utilize the enormous power of the i860. Although there are C and Fortran compilers for the i860, you'll need to write your code in RISC assembly to take complete advantage of the pipelining and paralellism. If you don't, the code won't be much faster than if it were run on a MIPS R3000 type processor. If you loved 680x0/80x86 assembly and enjoy getting down to the nitty gritty, and writing a page of code to do a divide, then you'll love the i860 (You'll especially enjoy writing and debugging pipelined parallel code. You also get to play with the caches, and can even switch between big and little endian formats). The i860 also has built-in RISC instructions to do Gouraud shading with 16-32 bit (pipelined or not) z-buffering. See page 9-21 of the i860 programmer's reference manual for more details and source code examples of 3-D rendering techniques. The Intel blurb sheets claims 40,000 Grouraud/Z-buffered polygons per second. That's 1333 polygons per frame in a system running at 30 frames/sec. For graphics work, 3-D libraries have already been written. I viewed a demo at HP-Appollo where a 68030 Appollo with one i860 displayed a radiosity/texture mapped room at about 4 frames/sec. The 68030 called libraries on the i860 subsystem. Finally, the price for such a board in the Amiga would be no less than (list) $2500 in quantity. The 25 Mhz i860 (parts that can't handle 33 or 40 Mhz) are still around $250. The RAMDAC will be over $100, VRAMS, dual port RAMS, DRAMS, PALs, PLAs, etc, all add up. Also, if you want to design the board well, you'll need a software tool like MENTOR (or equivalent, which require a Sun, Appollo, or HP workstation to run). MENTOR goes for around $40,000. To make your life easier, Intel offers a complete i860 design for the PC (just a math coprocessor, no video). John [BTW, there is at least one company working on an i860 board for the Amiga]