rick@cs.arizona.edu (Rick Schlichting) (06/02/91)
[Dr. David Kahaner is a numerical analyst visiting Japan for two-years
under the auspices of the Office of Naval Research-Asia (ONR/Asia).
The following is the professional opinion of David Kahaner and in no
way has the blessing of the US Government or any agency of it. All
information is dated and of limited life time. This disclaimer should
be noted on ANY attribution.]
[Copies of previous reports written by Kahaner can be obtained from
host cs.arizona.edu using anonymous FTP.]
To: Distribution
From: David K. Kahaner, ONR Asia [kahaner@xroads.cc.u-tokyo.ac.jp]
Re: Next generation computing directions, H. Aiso, (Keio U)
31 May 1991
ABSTRACT. Our translation of an article "New Possibilities for the Next
Generation Computer", by H. Aiso (Keio University) is presented.
In July 1990, an article (in Japanese) appeared in Gakusai Kenkyu News
No.10, by
Professor Hideo Aiso
Faculty of Environmental Information
Keio University, Fujisawa Campus
5322 Endo, Fujisawa-shi
Kanagawa 252 Japan
Tel: (0466) 47-5111, Fax: (0466) 47-5044
on next generation computing directions. We translated the article and
it appears below. Many thanks to Professor Aiso for his assistance during
the translation. Aiso was in the Faculty of Science and Engineering at
Keio University, worked to start the new Faculty of Environmental
Engineering and became its Dean. He is considered as having a very
important role in Japanese Computer Science. The article below, written
for popular consumption, appeared about one year ago. Gakusai Kenkyu
News is published by the Multidisciplinary Research Council of Japan, a
private organization that is one member of a research publicity
cooperation group supported by the Science Council of Japan (under the
Prime Minister's Office). Gakusai Kenkyu News does not appear in the Diet
Library Periodical Catalog. Aiso has also written a book on Novel
Computing that will be published this summer (1991).
New Possibilities for the Next Generation Computer
Hideo Aiso
Keio University
(July 1990)
1. Novel computing
I have given the new technology for the next generation computer a
generic name, "novel computing."
At present, silicon is the main type of the device, but some new devices
are being tested.
The first is a very high speed device; there is a possibility that a
gallium arsenide transistor will be several times faster at room
temperature. An HEMT (High Electronic Mobility Transistor) developed by
Fujitsu also has possibilities. Josephson junction devices, which hasve
been successful in our country, have sufficiently high speed.
A super lattice device is another possibility; very fast transistors can
be made by artificially arranging molecules and atoms in a lattice state.
At this moment, HEMT and gallium arsenide devices have already been put
to practical use or are close to that stage. Gallium arsenide is about 8
times faster than silicon at room temperature and HEMT is about 11 times
faster. In liquid nitrogen, silicon becomes about 4 times faster than at
room temperature. Gallium arsenide becomes about 3 times faster than
silicon, and HEMT about 22 times. These are property values and they
won't be that fast when they are used as transistors.
In MITI's supercomputer project, in which I participated and which was
finished this spring, an HEMT was actually used. This resulted in very
high speed, but it is very difficult to make stable devices in large
quantity and is surprisingly difficult to use. The speed falls and
becomes much slower than what is expected if the wiring is long.
Generally, Si-MOS has drawn attention for high speed. Many scientists
believe that it might be better to use Si-MOS after cooling.
Another topic is the Josephson junction. This has even faster speed. The
Electrotechnical Laboratory (ETL), Fujitsu, and Hitachi have developed
such devices. A 4-bit microprocessor was made with about 5000 Josephson
junction devices was the first successful 4-bit microprocessor made with
Josephson junction in the world. Its speed was about 26 times faster
than silicon.
An advantage of the Josephson junction is that it uses very little power.
While silicon uses 1.4 watts, the Josephson junction uses 0.005 watt.
Generally, a good logical circuit is determined by calculating the
product of speed and power. This is very favorable for the Josephson
junction. Making a logical circuit was a successful national project.
If it is possible, I would like to make 16 K bit/chip memory. Right now
memory is only 1 mega-bit or 4 mega-bit with ordinary silicon. A
16Kbit/chip HEMT RAM is completely accomplished.
However, it is very difficult to make memory with the Josephson junction.
Only 4 K-bit functions stably right now, but it will go to 16 K-bit in
the future. Japan is the first country in the world making a stable
functioning device.
2. Challenge of Tera FLOPS Machine
The graph shows the computational speed predicted by the
supercomputer project.
[The graph plots supercomputer performance vs year. A summary table is
given below. The plot was meant to be suggestive rather than exact.
YEAR Computer GFLOPS
---- -------------------------- ------
1976 Cray-1 0.1
1981 CDC Cyber-205
FACOM VP-100
0.3
1983 Cray-2
Cray X-MP
FACOM VP-200
HITAC S810
NEAC SX-1
0.7
1989 CDC ETA-10
Cray Y-MP
FACOM VP-400
HITAC S-820
NEAC SX-2
6.0
1990 High-Speed Parallel Processor
(Supercomputer Project)
FACOM VP-2000
NEAC SX-3
Cray-3
20.0
2001 Un-named 1000.0
Usually about 20 decimal numbers in the decimal system are calculated one
billion times per second. At present, supercomputers have about several
gigaFLOPS speed. Such computers include the CDC ETA-10, CRAY Y-MP, FACOM
VP-400, HITAC S-820, and NEAC SX-2. MITI's national project was
completed this spring, but its objective was 10 gigaFLOPS. This was
easily reached with four multiprocessors. With 16 multiprocessors, which
was the original plan, the speed will probably reach 50 gigaFLOPS. This
will make the fastest supercomputer at this time.
The plans that have already been announced are for FACOM VP-2000, NEAC
SX-3, and CRAY-3. They will be probably compute at about 20 gigaFLOPS.
For the 21st century, the problem is that we want a tera FLOPS machine by
all means. In physics, Professor Ken Wilson, who received the Novel
Prize at Cornell University, requires about 3 x 10**17 floating point
operations in order to calculate the behavior of a quark. It would take
100 years to do with the CRAY-1, and one year if it is calculated using a
10 gigaFLOP machine. If he wants to perform this calculation in several
days, he needs teraFLOP computing capability. If it can be done, then
various problems in physics will be solved at once.
The teraFLOP machine will become a very important tool for industries.
The manufacturing process will be changed. First of all, supercomputers
are used for analyzing various phenomena, designing, making prototypes,
doing complete simulation, and then making the final products.
The teraFLOP machine naturally will be a multiprocessor, with very high
speed devices, such as Josephson junctions and HEMTs. This goal will be
reached in the first 10 years of the 21st century.
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