witr@rwwa.COM (Robert Withrow) (05/22/91)
Does anyone have any detailed and factual knowlege about interrupt latency on SVR4.0.2.0 on (say) 33 MHz 386 processors? How about interrupt overhead? Does the version of SYSV spend large amounts of time with interrupts disabled? Thanks... -- --- Robert Withrow, R.W. Withrow Associates, Swampscott MA 01907 USA Tel: +1 617 598 4480, Fax: +1 617 598 4430, Net: witr@rwwa.COM