tmp@doc.ic.ac.uk (Trevor Peacock) (08/15/90)
Has anyone tried (or even considered) using blocks of four 256k simms to give 1Mb banks? Of course, this would require demultiplexing address line A9 into two bits to select one of the 256k blocks within the 1 meg bank. Has this be done? Is the ST's chippery able to handle the loading caused by the simms being connected in parallel? (this would be a total of 8 per bank for a 4 Mb system, two groups of eight in parallel) I'm sure this is a minefield of capacitance and timing problems, but would like to know whether anyone has had any success. Trev.. ------------------------------------------------------------------------------ Trevor Peacock, | Tel : 071 589 5111 X 5052 | JANET : tmp@uk.ac.ic.doc Department of Computing, | DARPA : tmp@doc.ic.ac.uk Imperial College, \ or tmp%uk.ac.ic.doc@nsfnet-relay.ac.uk 180 Queens Gate,London SW7 2BZ | UUCP : tmp@icdoc.UUCP or ..!ukc!icdoc!tmp
schultzd@frith.uucp (David Schultz) (08/16/90)
A friend of mine has a 520ST that upgraded by a true wizard to 1meg by piggy backing 256K chips. You solder a second chip over the first. It is amazingly difficult and you never know what will happen. It often takes a couple tries, but it CAN BE DONE... -- Case Center for C.A.E., M.S.U., Consultant | schultzd@egr.msu.edu ACM, Michigan State Univ. Chapter, Chairperson | schultzd@cpsin.cps.msu.edu Michael Schenker Group ;^) | schenkerm@msg.uhamburg.edu ~~~~~~~~~~~~~~~~~~~~~~ ARMAGEDDON SOFTWARE DEVELOPMENT ~~~~~~~~~~~~~~~~~~~~~~
wilko@idca.tds.PHILIPS.nl (W.C. Bulte) (08/16/90)
Newsgroups: comp.sys.atari.st.tech Subject: Re: stacking 256k simms Summary: Expires: References: <2190@gould.doc.ic.ac.uk> Sender: Reply-To: Followup-To: Distribution: Organization: Philips Information Systems, Apeldoorn, The Netherlands Keywords: In article <2190@gould.doc.ic.ac.uk> tmp@doc.ic.ac.uk (Trevor Peacock) writes: >Has anyone tried (or even considered) using blocks of four 256k simms to give >1Mb banks? Of course, this would require demultiplexing address line A9 into >two bits to select one of the 256k blocks within the 1 meg bank. Has this >be done? Is the ST's chippery able to handle the loading caused by the >simms being connected in parallel? (this would be a total of 8 per bank for a >4 Mb system, two groups of eight in parallel) >I'm sure this is a minefield of capacitance and timing problems, but would >like to know whether anyone has had any success. > >Trev.. > >------------------------------------------------------------------------------ >Trevor Peacock, | Tel : 071 589 5111 X 5052 | JANET : tmp@uk.ac.ic.doc >Department of Computing, | DARPA : tmp@doc.ic.ac.uk >Imperial College, \ or tmp%uk.ac.ic.doc@nsfnet-relay.ac.uk >180 Queens Gate,London SW7 2BZ | UUCP : tmp@icdoc.UUCP or ..!ukc!icdoc!tmp > > Somebody did. I got a copy somewhere of a german magazine (ST Computer ??) which describes such a memory extension. Indeed there is some logic involved to demux A9 and address the ram banks. Theoretically it ought to work, but with all the added wiring and chip capacitance I think it stinks.. We have enough problems with installing "simple" 1 Mbit chips as it is. (Well, not all of us, but according to this newsgroup frequent enough). _ ______________________________________________________________________ | / o / / _ Wilko Bulte Domain: wilko@idca.tds.philips.nl |/|/ / / /( (_) uucp : [mcsun,hp4nl]!philapd!wilko * Philips Information Systems Nederland phone: 055-432652 fax: 055-432103 ____________________________________________________________________________
windy@beauty.informatik.rwth-aachen.de (Andrew John Stuart Miller) (08/20/90)
tmp@doc.ic.ac.uk (Trevor Peacock) writes: >Has anyone tried (or even considered) using blocks of four 256k simms to give >1Mb banks? Of course, this would require demultiplexing address line A9 into >two bits to select one of the 256k blocks within the 1 meg bank. Has this >be done? Is the ST's chippery able to handle the loading caused by the >simms being connected in parallel? (this would be a total of 8 per bank for a >4 Mb system, two groups of eight in parallel) >I'm sure this is a minefield of capacitance and timing problems, but would >like to know whether anyone has had any success. >Trev.. >------------------------------------------------------------------------------ >Trevor Peacock, | Tel : 071 589 5111 X 5052 | JANET : tmp@uk.ac.ic.doc >Department of Computing, | DARPA : tmp@doc.ic.ac.uk >Imperial College, \ or tmp%uk.ac.ic.doc@nsfnet-relay.ac.uk >180 Queens Gate,London SW7 2BZ | UUCP : tmp@icdoc.UUCP or ..!ukc!icdoc!tmp This has been done in the German 'ST' magazine, using DIPS rather than simms. A freind of mine over here has implemented this solution - on an ST520+ we had to use a small electric saw to remoce the old on board chips, meaning we that we could then desolder the individual pins, rather than the whole chips. This significantly reduces the risc of dammaging the motherboard. we could then solder in modified sockets, and then insert the piggy backed dips. Some flying wires were needed to give adequate earth shielding, which proved to be the downfall of this experiment. The system ran OS9 with one user on a terminal for about a week without any problems. As soon as the holidays were over and the owner of the ST began to log in on the console, which was in a room locked during the break, problems with timing began - We thought there might be standing waves in the earth lines, which being wire, as apposed to perfect conductors are of course not at earth anyway! The fact that the system worked single user was because only a small address range was used, and refresh hardware could cope with the problem, whatever it was. As soon as multi user (multi tasking) resumed, the standing waves or whatever canceled the refresh signals or something allong these lines... We replaced the Earth wiring with shorter connections, and more of them, and the problem went away... for about two weeks. The 520 has its Store ("memory" to lusers memory is cache/associative store. Store is anything else) directly beneath the keyboard. As time went on, the connections worked loose and all the wonderful work literally fell to pieces. Two sessions of soldering on the modified sockets allowed the soldered modifications to work loose, adding to the death of this otherwise nice modification to an ST. We then bought a locally made addon board, and transfered the chips to it. This has been working perfectly ever since (4 months) despite the computer having been moved several times. I will post more details about the memory expansion board as soon as I can find the comercial address of the firm in that heap of unsorted papers called my desk. If you want more details about hacking it yourself, send Email to me, and I will try to get a copy of the construction details of the 'ST' magazine circuit to you. Happy soldering, and dont let Farraday catch you unawares!! Andrew Miller -------------------------------------------------------------------------------- email: windy@strange.informatik.rwth-aachen.de snail: Ruetscherstr 165 D-5100 Aachen voice: 0049 (0)241 894-355