defrain@ei.ecn.purdue.edu (05/28/91)
Does anyone know the procedure for a piggy-back upgrade of a 512K 520 ST to have 1MB? I cannot see from the schematic how to properely connect the addressing to the 256K DRAMs. Do other ICs need to be added? If someone has experience here and/or knows the fine detail of the procedure could you send a brief description of the various connections and necessary modifications. the balance of future computing history weighs heavy in your hands, Paul ............................................................................. Paul D. DeFrain : "Physical concepts are free creations of : Purdue University, : the human mind, and are not, however it : Dept. of Electrical Engineering : may seem, uniquely determined by the ex- : defrain@ecn.purdue.edu : ternal world." --- A. Einstien : (317)49-43556 (am), 497-9903 : ......................................... :
ele9110@cdc835.cdc.polimi.it (Oluzzi Massimo) (05/31/91)
defrain@ei.ecn.purdue.edu writes: >Does anyone know the procedure for a piggy-back upgrade of a 512K >520 ST to have 1MB? I cannot see from the schematic how to properely >connect the addressing to the 256K DRAMs. Do other ICs need to be added? >If someone has experience here and/or knows the fine detail of the procedure >could you send a brief description of the various connections and necessary >modifications. There is a file, named "1megupgr.arc", which contains the infos requested. I found it on sol.cs.ruu.nl (131.211.80.5), directory /ATARI-ST/doc . Be kind to this ftp site, as they ask at connection time. Bye, Massimo Oluzzi ele9110@cdc835.cdc.polimi.it