[comp.sys.ibm.pc.misc] Orchid ProDesigner II problems

boyne@hplvli.HP.COM (Art Boyne) (09/12/90)

I recently purchased an Orchid ProDesigner II w/512K for my home system and
have been having some problems with it and would like to know if anyone else
has seen similar problems.

First off, my system is a no-name 12.5 MHz compatible based on the VLSI chip
set with an AMI BIOS.  In addition to the ProDesigner II, I have a DTC 5280
floppy/hard disk controller, a generic serial/parallel port card, and an Everex
RAM3000 Deluxe expanded memory board.  I have the ProDesigner II jumpered for
16-bit ROM decode (C000-C7FF) and the compatibility switch set ON.  The
symptoms, though, appear to be independent of the compatibility switch
setting and presense/non-presense of the RAM3000 board.

The problems that I'm seeing are:

  1)  When the Orchid logo is shown at boot-up, there are 22 vertical "ladders"
      through the logo, which are definitely not supposed to be there.

  2)  The card fails the CGA-mode diagnostics both built in to my BIOS and
      provided with the card.  Failure mode is that any TEXT displayed in
      graphics mode is missing the right half of every character, and color
      blocks have lines and miscellaneous wrong-color pixels.

  3)  The system will fail to find the parallel port on boot-up if the
      memory test portion of the power-on self test is allowed to run.

One might think the ProDesigner II is defective, but I have already sent
the first one back, and the second one has exactly the same problems.
Next guess is the mother board, but after swapping the mother board for
a newer design (still VLSI chip-set based but a completely different layout),
the "ladders" and CGA failures disappear (but not the parallel port problem),
only to be replace by having the machine lock up completely (no Cntl-Alt-Del)
when running certain EGA-mode programs (three different ones!).  BTW, the
problems are the same whether I'm running at 12 MHz or 8 MHz on either board.

I'm beginning to suspect a incompatibility between the ProDesigner II design
and the VLSI chip set, probably a memory decoding problem.  Anyone have any
insight/knowledge?

Art Boyne, boyne@hplvla.hp.com