[comp.os.msdos.misc] TURBOC make with command lines > 127 chars - HOW?

marwk@levels.sait.edu.au (12/24/90)

I have a makefile which has:
OBJS = a.obj b.obj c.obj \
       (several more files here ...)  \
       x.obj y.obj z.obj

$(EFILE):  $(OBJS)
    tcc  -c -m$(MM)  $(OBJS)


The tcc line gets converted to:

    tcc -emain.exe -ms a.obj b.obj ...
x.obj y.obj z.obj

and the message
Fatal: Cammand arguments too long
appears.

In the reference manual Appendix D it states that the command line cannot
be longer than 127 characters a DOS limitation.

How can I produce the desired exe file using make with this limitation?

Thank you in advance.
Ray

roy%cybrspc@cs.umn.edu (Roy M. Silvernail) (12/25/90)

marwk@levels.sait.edu.au writes:

> In the reference manual Appendix D it states that the command line cannot
> be longer than 127 characters a DOS limitation.
> 
> How can I produce the desired exe file using make with this limitation?

Place the obj file names in a file, like this:
(lines in here can be quite long, but it's best to keep them under 80
characters, and continue with +)

a.obj b.obj c.obj +
d.obj....

call it lnkfile and compile with

     tcc  -c -m$(MM)  @lnkfile

I do similar things with tlink all the time.
--
Roy M. Silvernail |+|  roy%cybrspc@cs.umn.edu  |+| #define opinions ALL_MINE;
main(){float x=1;x=x/50;printf("It's only $%.2f, but it's my $%.2f!\n",x,x);}
"This is cyberspace." -- Peter da Silva  :--:  "...and I like it here!" -- me

ewilliam@blackbird.afit.af.mil (Edward M. Williams) (12/26/90)

marwk@levels.sait.edu.au writes:

> In the reference manual Appendix D it states that the command line cannot
> be longer than 127 characters a DOS limitation.
> 
> How can I produce the desired exe file using make with this limitation?

A beter way to solve this problem is to get dmake -- it can generate the
response file automatically for you.  you don't have to maintain a separate
list of your object files!

Ed Williams
ewilliam@afit.af.mil (129.92.1.2)

berggren@eecs.cs.pdx.edu (Eric Berggren) (12/28/90)

marwk@levels.sait.edu.au writes:

>I have a makefile which has:
>OBJS = a.obj b.obj c.obj \
>       (several more files here ...)  \
>       x.obj y.obj z.obj

>$(EFILE):  $(OBJS)
>    tcc  -c -m$(MM)  $(OBJS)


>The tcc line gets converted to:

>    tcc -emain.exe -ms a.obj b.obj ...
>x.obj y.obj z.obj

>and the message
>Fatal: Cammand arguments too long
>appears.

>In the reference manual Appendix D it states that the command line cannot
>be longer than 127 characters a DOS limitation.

>How can I produce the desired exe file using make with this limitation?

  I have always been constrained to doing the damn files one-by-one in
the makefile. I have seen methods such as:

.c.obj:
	$(CC) $(CFLAGS) *.c;

test.obj:   test.c test.h

  etc... but I have never been able to get it to work. If you get any
good information to be able to set it up the "traditional way" please
lemme know. Thanx.


==============================================================================

     "Round and round the while() loop goes;
           Whether it stops," Turing says, "nobody knows."

williams@umaxc.weeg.uiowa.edu (Kent Williams) (12/29/90)

Since no one else has jumped in, here's how to do long command lines in make.
It requires invoking echo to create the response file -- tcc's make may be
able to do the redirection internally.

#
# sample makefile
# make rule for tcc.  may not be necessary
.c.obj:
		tcc -c $(CFLAGS) $*.c

# split your objects into macros < 128 bytes
O1=a.obj b.obj c.obj d.obj e.obj f.obj g.obj h.obj
O2=i.obj j.obj k.obj l.obj m.obj n.obj o.obj p.obj
O3=q.obj r.obj s.obj t.obj u.obj v.obj w.obj x.obj
O4=y.obj z.obj
# slam 'em back together for dependency
OBJ = $O1 $O2 $O3 $O4
#
# main program rule
program.exe : $(OBJ) program.lnk
		tlink @program.lnk
#
# link response file -- depends on makefile, since makefile makes it
program.lnk	: makefile
		echo $(LIB)\c0$(MODEL).obj + 	> $@
		echo $(O1) +					>> $@
		echo $(O2) +					>> $@
		echo $(O3) +					>> $@
		echo $(O4)						>> $@
		echo $*.exe						>> $@
		echo $*.map
		echo $(LIB)\math$(MODEL).lib $(LIB)\emu.lib $(LIB)\c$(MODEL).lib


--
             Kent Williams --- williams@umaxc.weeg.uiowa.edu 
"'Is this heaven?' --- 'No, this is Iowa'" - from the movie "Field of Dreams"
"This isn't heaven, ... this is Cleveland" - Harry Allard, in "The Stupids Die"

wallis@labc.enet.dec.com (Barry L. Wallis) (12/30/90)

In article <15782.27753f1b@levels.sait.edu.au>, marwk@levels.sait.edu.au writes...
|>I have a makefile which has:
|>OBJS = a.obj b.obj c.obj \
|>       (several more files here ...)  \
|>       x.obj y.obj z.obj
|> 
|>$(EFILE):  $(OBJS)
|>    tcc  -c -m$(MM)  $(OBJS)
|> 
|> 
|>The tcc line gets converted to:
|> 
|>    tcc -emain.exe -ms a.obj b.obj ...
|>x.obj y.obj z.obj
|> 
|>and the message
|>Fatal: Cammand arguments too long
|>appears.
|> 
|>In the reference manual Appendix D it states that the command line cannot
|>be longer than 127 characters a DOS limitation.
|> 
|>How can I produce the desired exe file using make with this limitation?
|> 

If you have the latest version of Borland's make (V3.0) you can use the make &&
operator and a response file as follows:

$(EFILE):  $(OBJS)
    tcc  -c -m$(MM)  @&&!
$(OBJS)
!

The "@" tells tcc to read the next argument(s) from the given file. The "&&!"
tells make to put everything (starting with the next line) in a temporary file
until it hits the next "!". It then substitutes the filename after the "@" on
the command line and executes the line. I have used this technique to get
around the 127 character limit. And, yes, the "$(OBJJS)" macro is expanded.

---
Barry L. Wallis			USENET: wallis@labc.dec.com
Database Consultant		Prodigy (don't laugh): DNMX41A
U.S. DECtp Resource Center	DECUServe: EISNER::WALLIS (not on the net yet)
Los Angeles, CA			"No one voted for me, I represent myself"
---