plim@hpsgwp.sgp.hp.com (Peter Lim) (12/28/90)
Hi Netlanders,
I have an urgent question. How do I ensure that a 486 CPU is not a dud ?
I have heard before that revision B5 and earlier of the 486 chip has a
defect which causes the chip to fail under UNIX or similar protected mode
OS. I have also heard that revision B6 and onward is fine. Then, what
changes are there from B6 to C0 or C1 revisions ?
I am currently evaluating a 486 board with OPTI cache controller. The
manual claim that the 486 is revision B6 (but it is not printed on the
CPU itself). How can I find out if the chip is really B6 revision one ?
What test program can I run to find that out ?
I have to make the decision in 2 days' time, that's the reason for the
'urgent' above :-).
Any word of wisdom is welcome. E-mail me directly or post to this
group. Thanks in advance.
Regards, . .. ... .- -> -->## Life is fast enough as it is ........
Peter Lim. ## .... DON'T PUSH IT !! >>>-------,
########################################### :
E-mail: plim@hpsgwg.HP.COM Snail-mail: Hewlett Packard Singapore, :
Tel: (065)-279-2289 (ICDS, ICS) |
Telnet: 520-2289 1150 Depot Road, __\@/__
Singapore 0410. SPLAT !
#include <standard_disclaimer.hpp>kaleb@thyme.jpl.nasa.gov (Kaleb Keithley) (12/28/90)
In article plim@hpsgwp.sgp.hp.com (Peter Lim) writes: >I am currently evaluating a 486 board with OPTI cache controller. The >manual claim that the 486 is revision B6 (but it is not printed on the >CPU itself). How can I find out if the chip is really B6 revision one ? The rev. no. is printed on the bottom of the chip, you can't see it unless you remove the cpu from the board. Feeling lucky? If so, you can carefully pry out cpu and look. Otherwise you have to take your vendors' word. >I have an urgent question. How do I ensure that a 486 CPU is not a dud ? >I have heard before that revision B5 and earlier of the 486 chip has a >defect which causes the chip to fail under UNIX or similar protected mode >OS. I have also heard that revision B6 and onward is fine. Then, what >changes are there from B6 to C0 or C1 revisions ? My B5 works flawlessly with ESIX (UNIX) and OS/2. -- Kaleb Keithley Jet Propulsion Labs kaleb@thyme.jpl.nasa.gov Offensive quote coming soon to a .signature file near you.
rickf@pmafire.inel.gov (Rick Furniss) (12/29/90)
I,m unable to get the Micronics 25-486 board to work with SCO Unix at
this point in time, but am working with Gateway to try and locate the problem.
Would appreciate anyone running 486 boards to state which board,
& which Unix they have gotten to work ???
***** Standard Disclaimer ****
Rick Furniss
rickf@pmafire.inel.govilan343@violet.berkeley.edu (Geraldo Veiga) (12/29/90)
In article <1990Dec28.203546.28899@pmafire.inel.gov> rickf@pmafire.inel.gov (Rick Furniss) writes: > > I,m unable to get the Micronics 25-486 board to work with SCO Unix at >this point in time, but am working with Gateway to try and locate the problem. > > Would appreciate anyone running 486 boards to state which board, >& which Unix they have gotten to work ??? > >***** Standard Disclaimer **** > >Rick Furniss I am running ISC 2.2 on a 486/25 board made by US Tronics. I was under the impression that most of these 486/motherboards wouldn't have any problem booting up UNIX/386. I mentioned US Tronics before in this newsgroup and got few requests for more information. If anyone else is interested, here is their address: U.S. Tronics 480 Carlton Ct. So. San Francisco, CA 94080 Tel (415) 875-6888 Fax (415) 875-6868 Specs: 25MHz or 33MHz 80486 128K/512K external cache Weitek support 16MB onboard memory Interleaved page mode memory Seven 16-bit and one 8-bit slots
plim@hpsgwp.sgp.hp.com (Peter Lim) (12/29/90)
I have done quite a bit more testing of the motherboard since I last posted.
I sure feels unlucky that the version number is printed at the bottom of
the chip. And on my motherboard, the chip has a sticker over it which reads,
"Warranty void if tempered with" :-(.
May be someone from Intel cann tell from the markings (date code etc ??)
on top of the chip. On mine, it says ....
A80486DX-25
SX308
I0332313
INTEL(M)(C)1989
Does that make any sense ? Should the date '1989' strike fear ??
Well, if I didn't mention in my original posting. This board uses the OPTI
cache controller chipset. The AMI BIOS is dated 04/09/90 (April, 90). I was
having a lot of problem trying to start SCO UNIX/386 on the machine. After
the boot: prompt upon booting the UNIX N1 disk, hitting RETURN sends the
machine back to a cold boot. Finally, I went in a play around with the
AMI BIOS CMOS setup. I found that by setting the CACHEABLE MEMORY to 15 MB
instead of 16 MB (I have 16 MB RAM installed), the machine is able to boot
the N1 disk to the point where it request sticking in the N2 disk. I haven't
tested beyond that point yet. Soon ......
May be this info is useful to someone; or may be someone like to point out
that this is a sign of trouble with the cache system. I also found that
with 12 MB of RAM, there is no problem at all. So, something must be happening
at the 16 MB boundary.
Since someone mentioned that B5 version will work fine with OS/2 and UNIX
too, then how can I test to make sure that I have a good chip ? Anyone
has any idea what changes were made in each of the revisions (B5, B6, C0,
C1 etc. etc.) ?
BTW, what benchmark reading should I get from a 486-25 with 128K external
cache. I got Performance index of 54.0 from Norton 5.0's SYSINFO (but
38.x from Norton 4.5's SI).
Much thanks for anymore information.
Regards, . .. ... .- -> -->## Life is fast enough as it is ........
Peter Lim. ## .... DON'T PUSH IT !! >>>-------,
########################################### :
E-mail: plim@hpsgwg.HP.COM Snail-mail: Hewlett Packard Singapore, :
Tel: (065)-279-2289 (ICDS, ICS) |
Telnet: 520-2289 1150 Depot Road, __\@/__
Singapore 0410. SPLAT !
#include <standard_disclaimer.hpp>jimf@idayton.field.intel.com (Jim Fister) (12/30/90)
Immediate disclaimer: I am not an i486(TM) expert. Okay, Intel specs each chip that they manufacture if it is in any way different from the data sheet. The second line on the top of the chip should start off with SX---. This is the S spec on the chip. The ones I know from memory are: SX308 B6 step. SX328 C0 step. SX329 C0 step. I think. Anyway, the S spec will tell you what you have if you ask the right people. I have no idea what the errata for each step is. As far as I know, however, the B6 and C0 steps should have no problems with any UNIX derivative, and certainly not with DOS or OS/2. That's my input. I'm off to go drinking. Standard disclaimer: If I ever tried to talk on the net for Intel, they'd shoot me, so I keep to my own opinions. Greetings from the Rocking Metropoolis. JimF