steveh@tasman.cc.utas.edu.au (Steven Howell) (04/24/91)
Evening peoples. I have just decided to design an IDE controller for one of my systems. After going over the other options (SCSI,RLL,MFM) we decided to go IDE. What i am after is a chip, or chipset designed to impliment IDE protocol. Does anyone know of a good chip/chipset for this task. The system we are putting the Hard drive into is a 65c802 running at 12Mhz. Interface will be a maximum of 8 data/8 address/2 ChipSelect lines/2 DMA/ 1 IRQ and any frequency system clock. (if required) all replies will be greatfully accepted.. thanks in advance. steve h