bangarth@uwovax.uwo.ca (03/20/91)
Where can I find a good discussion on interrupts? Questions I seek to answer include : is there a priority among interrupts, and if so, how could I switch them around so that a particular device, ie. mouse, could become a higher/highest priority. This is a possible tie in with the accurate timing request earlier. Thanks for any pointers or ideas. Peter Bangarth
markh@csd4.csd.uwm.edu (Mark William Hopkins) (03/29/91)
In article <1991Mar19.131959.8841@uwovax.uwo.ca> bangarth@uwovax.uwo.ca writes: >Where can I find a good discussion on interrupts? Here. :) From highest to lowest: Divide Overflow (INT 0), INT n, INTO (which is the overflow interrupt = INT 4), NMI (non-maskable interrupt = INT 2) External interrupt on INTR line (INT 8 to INT f (hex)). Single-step interrupt (INT 1). INTR's ultimately come from hardware lines on the system board (Timer = 8, Keyboard = 9, (a is reserved), COM2 = b, COM1 = c, Disk = d, Diskette = e, Printer = f) and are called respectively interrupt requests (IRQ) 0 to 7. NMI normally comes from the system board and marks a critical system board error (unless the manufacturer abuses this intended purpose of NMI). Divide by zero comes from the chip itself during a divide instruction. I believe that if any of these interrupts are called from software with an explicit INT n instruction then they are treated priority-wise as INT n, regardless of the special meanings they may otherwise carry.
sking@nowhere.uucp (Steven King) (04/01/91)
In article <10586@uwm.edu> markh@csd4.csd.uwm.edu (Mark William Hopkins) writes: >In article <1991Mar19.131959.8841@uwovax.uwo.ca> bangarth@uwovax.uwo.ca writes: >>Where can I find a good discussion on interrupts? > >Here. :) > >From highest to lowest: > Divide Overflow (INT 0), > INT n, > INTO (which is the overflow interrupt = INT 4), > NMI (non-maskable interrupt = INT 2) > External interrupt on INTR line (INT 8 to INT f (hex)). > Single-step interrupt (INT 1). > >INTR's ultimately come from hardware lines on the system board (Timer = 8, >Keyboard = 9, (a is reserved), COM2 = b, COM1 = c, Disk = d, Diskette = e, >Printer = f) and are called respectively interrupt requests (IRQ) 0 to 7. > A good source of information is the intel reference manuals. Priority of the external interrupts, relative to each other, is a determined by the programming of the external interrupt controller(s), normally (always?) 8259A's. The 8259A is documented in most every intel micro or peripheral handbook throughout the 80's. Its pretty straight forward ( for an intel chip ) to program. However, re-programming it to change interrupt priorities probably isnt advisable unless you are certain of the requirements of the other hardware... -- If it don't stick, stink, or sting It ain't from Texas. ..!cs.utexas.edu!ut-emx!nowhere!sking