[comp.sys.apple2] Dos 3.3 revisited..:)

GRAY@ADMIN.HumberC.ON.CA (Kelly Gray) (04/15/90)

The //gs always slows down to 1MHz when doing anything involving a Disk II
controller card. The timing of the stepper motor sequencing is not all that
critical, but the timing of the actual data reading or writing is.

 As long as the minimum settling time for each step in maintained, the stepper
motor phase switches can be tripped at full speed even in a //gs.  It's just
that the delay between phases must be made to last for more clock cycles if the
processor speed is higher

On the other hand, the timing of the reading or writing data is *very* critical
 There will be a data byte read from the disk every 32 microseconds when
reading, and there must be a data byte written to the disk every 32
microseconds when writing. If that timing is off by even one microsecond, the
results will be garbage.

      <o_o>