alfter@MRCNEXT.CSO.UIUC.EDU (Scott Alfter) (04/12/90)
I just got the May issue of Nibble today, and on page 7, Applied Engineering
has an ad for its answer to the Zip Chip. The TransWarp III works at 8 MHz out
of the box, and like the TransWarp GS, it's upgradable--to 12 MHz, according
to the ad. The picture indicates nothing that looks like a 65C02 as we're used
to seeing them, but it shows two square chips and a host of smaller DIPs. AE
claims DMA compatibility, and the card will function as a language card in slot
0 in the II and II Plus. It lists for $200, which is a bit more than the
original TransWarp and TransWarp II sold for, but this sounds like a
significant advancement over those cards, and the price through distributors
like Quality Computers and Preferred Computing will probably be somewhere
around $150--maybe less, but this is just an educated guess.
Scott Alfter-------------------------------------------------------------------
Internet: alfter@mrcnext.cso.uiuc.edu _/_ Apple II: the power to be your best!
cs122aw@ux1.cso.uiuc.edu / v \
saa33413@uxa.cso.uiuc.edu ( ( A keyboard--how quaint!
Bitnet: free0066@uiucvmd.bitnet \_^_/ --M. Scott, STIVcyliao@eng.umd.edu (Chun-Yao Liao) (04/12/90)
In article <9004112112.AA11038@mrcnext.cso.uiuc.edu> alfter@MRCNEXT.CSO.UIUC.EDU (Scott Alfter) writes: >of the box, and like the TransWarp GS, it's upgradable--to 12 MHz, according >to the ad. The picture indicates nothing that looks like a 65C02 as we're used Wow! 12 MHz! but... >to seeing them, but it shows two square chips and a host of smaller DIPs. AE >claims DMA compatibility, and the card will function as a language card in slot oops, again, it's a CARD! Too bad that I have to stick with Zip Chip . >0 in the II and II Plus. It lists for $200, which is a bit more than the >original TransWarp and TransWarp II sold for, but this sounds like a >significant advancement over those cards, and the price through distributors >like Quality Computers and Preferred Computing will probably be somewhere >around $150--maybe less, but this is just an educated guess. But why don't they put the 20/28 MHz 65816 instead? and selling at $200 is a resonable price then. > >Scott Alfter------------------------------------------------------------------- -- cyliao@wam.umd.edu o NeXT : I put main frame power on two chips. @epsl.umd.edu o people: We put main flame power on two guys. @bagend.eng.umd.edu o :::::::::::::::::::::::::::::::::::::::::::: xxxxx@xxxxx.xxx.xxx (reserved) o RC + Apple // + Classic Music + NeXT = cyliao
alfter@MRCNEXT.CSO.UIUC.EDU (Scott Alfter) (04/13/90)
mojo!cyliao@mimsy.umd.edu (Chun-Yao Liao) writes:
------------------------------------start------------------------------------
But why don't they put the 20/28 MHz 65816 instead? and selling at $200 is
a resonable price then.
-------------------------------------end-------------------------------------
Who knows? Maybe they are. I don't see anything in the picture of the card
that looks like a 65C02--or a 65C816 of the type (40-pin DIP) used in the GS,
so maybe the TransWarp III is AE's first product to use the ASIC '816. I
suppose someone will just have to order one and tell us what it's like.
BTW, I guessed that the mail-order houses would have it for somewhere around
$150 in my last post. Maybe I should've checked other ads in Nibble because
Preferred Computing has them for $149. Not a bad guess, if I do say so
myself. :-) On the subject of Applied Engineering in general, it seems that
the mail-order companies like Preferred Computing and Quality Computers usually
stock AE stuff and sell it for around 75% of list. When I was looking for the
best price on a DataLink 2400 a few months ago, I was a bit surprised to find
that most of the companies have prices that vary by no more than a few dollars
one way or the other. If you've ever ordered from one of these companies and
they've given you good-enough service, you're probably better off getting all
your AE stuff from them in the future--just to be nice to them. (If they
jerked you around, though, that's another matter. BTW, Quality Computers
gave me no grief--I don't know if I mentioned that to the guy doing the AE
survey.)
Finally, let me know what you think of the new .sig. You should see a missile
approaching MS-DOS from the left and blowing it up. If it doesn't work, let
me know and I'll get rid of it if enough people complain. (In any case, it's
the thought that counts, right? :-) )
Scott Alfter-------------------------------------------------------------------
Internet: alfter@mrcnext.cso.uiuc.edu _/_ Apple II: the power to be your best!
cs122aw@ux1.cso.uiuc.edu / v \
saa33413@uxa.cso.uiuc.edu ( ( A keyboard--how quaint!
Bitnet: free0066@uiucvmd.bitnet \_^_/ --M. Scott, STIV
New "Animated .sig" (TM) (Note: Works best at 2400 baud or less.)
MS-DOS ==> ==> ==> ==> ==> ==> ==> ==> ==> ==> ==> ==> ==> ==> ==> ==> ==> ==> ==> ==> ==> ==> ==> ==> ==> ==> ==> ==> ==> ==> ==> ==> ==> ==> ==> ==> ==> ==> ==> ==> ==> ==> ==> ==> ==> ==>BOOMcyliao@eng.umd.edu (Chun-Yao Liao) (04/13/90)
In article <9004121815.AA18119@mrcnext.cso.uiuc.edu> alfter@MRCNEXT.CSO.UIUC.EDU (Scott Alfter) writes: >one way or the other. If you've ever ordered from one of these companies and >they've given you good-enough service, you're probably better off getting all >your AE stuff from them in the future--just to be nice to them. (If they >jerked you around, though, that's another matter. BTW, Quality Computers >gave me no grief--I don't know if I mentioned that to the guy doing the AE >survey.) AAAARRRRGGGGGHHHHHH Just want to mention that don't EVER NEVER NUNGA KABHI-NAHIN BUY ANY THING FROM FAS-TRACK. THEY ATE MY $$$$!!!! I MADE THAUSANDS OF CALLS AND WROTE MILLIONS OF LETTERS ASKING FOR MY $$$$ BACK, ALL I GOT WAS A "SWEET" ASNWER OF "NO PROBLEM, WE'LL TAKE CARE OF THAT!" SURE, THEY *DID* TAKE *CARE* OF *MY* MONEY!!!!! This is a warning for all you guys who is going to order anything from a mail-order company... be sure if you don't order from this company you have less chance to get into trouble. Hope this help. >Finally, let me know what you think of the new .sig. You should see a missile >approaching MS-DOS from the left and blowing it up. If it doesn't work, let >me know and I'll get rid of it if enough people complain. (In any case, it's >the thought that counts, right? :-) ) Uh... I see nothing except lots of ^H^H^H on the screen, quite a mess... -- cyliao@wam.umd.edu o NeXT : I put main frame power on two chips. @epsl.umd.edu o people: We put main flame power on two guys. @bagend.eng.umd.edu o :::::::::::::::::::::::::::::::::::::::::::: xxxxx@xxxxx.xxx.xxx (reserved) o RC + Apple // + Classic Music + NeXT = cyliao
rbannon@mira.acs.calpoly.edu (Roy Bannon) (04/13/90)
In article <9004121815.AA18119@mrcnext.cso.uiuc.edu> alfter@MRCNEXT.CSO.UIUC.EDU (Scott Alfter) writes: >mojo!cyliao@mimsy.umd.edu (Chun-Yao Liao) writes: >------------------------------------start------------------------------------ >But why don't they put the 20/28 MHz 65816 instead? and selling at $200 is >a resonable price then. >-------------------------------------end------------------------------------- > >Who knows? Maybe they are. I don't see anything in the picture of the card >that looks like a 65C02--or a 65C816 of the type (40-pin DIP) used in the GS, >so maybe the TransWarp III is AE's first product to use the ASIC '816. I >suppose someone will just have to order one and tell us what it's like. The two square chips in the picture are in a package called PLCC for plastic leadless chip carrier. IMHO the smaller of the two squares is the uP. The transwarp GS also use the PLCC version of the WDC65C816. Hope this clears up any questions. Roy
gwyn@smoke.BRL.MIL (Doug Gwyn) (04/14/90)
In article <1990Apr12.150904.17462@eng.umd.edu>, cyliao@eng.umd.edu (Chun-Yao Liao) writes: > But why don't they put the 20/28 MHz 65816 instead? WHAT 20/28 MHz 65816? Do you have one?
cyliao@eng.umd.edu (Chun-Yao Liao) (04/14/90)
In article <12588@smoke.BRL.MIL> gwyn@smoke.BRL.MIL (Doug Gwyn) writes: >In article <1990Apr12.150904.17462@eng.umd.edu>, cyliao@eng.umd.edu (Chun-Yao Liao) writes: >> But why don't they put the 20/28 MHz 65816 instead? > >WHAT 20/28 MHz 65816? Do you have one? Ok Ok, I don't have one, and don't know who ACTUALLY have one, but from the last posts about ASIC 65816, they sounded like it's out in samll amount as examples, so I assum it's ready for shipment in quantity by now. BTW, havent hear anything about this ASIC made chip lastly, any clue? -- cyliao@wam.umd.edu o NeXT : I put main frame power on two chips. @epsl.umd.edu o people: We put main flame power on two guys. @bagend.eng.umd.edu o :::::::::::::::::::::::::::::::::::::::::::: xxxxx@xxxxx.xxx.xxx (reserved) o RC + Apple // + Classic Music + NeXT = cyliao
sb@pro-generic.cts.com (Stephen Brown) (05/02/90)
In-Reply-To: message from brianw@microsoft.UUCP Really, Brian Willoughby's message is about the ASIC 65816. >I found it hard to believe (and still do) that some college kid has done a > better job all by himself than what the Western Design Centre can do with >a team of enginners. Now I'm not too surprised that his "20 Mhz" CPU has >turned out to be 15 Mhz (which you will note is only about 2 Mhz faster Oh boy! If you don't believe that 'some college kid' has done this, you can read the Michigan State University's alumni newsletter for details. You'll read that he didn't do this task all by himself. Some college kids can't write. Others can. Why is it SO inconceivable that one particularly bright one could co-design something really good? Got something against college students? Bill Mensch may have been the chief designer of the 65816, but my understanding is that his wife or daughter (or something) did the layout, without CAD. His chip's design might be okay, but its far from optimum. WDC's 62816's are experimental above 8 Mhz, and even the 8 Mhz ones are not available in large quantity. ASIC's will be. WDC's 65816 chips will not run all instructions at full speed. ASIC's will. WDC's 65816 chips require 6 volts for the fast (experimental) ones. ASIC's take just 5, as they should. Indeed, the fastest WDC 65816's are 13 Mhz, but so few are available (due to poor yield) that they are still a freak of nature. >The fact is that the overall CPU speed >is based on many factors, with the slowest measured timing being the limit. What ARE you talking about? If the CLOCK speed can run at xx Mhz, then it says something about all aspects of the IC's timing. Other than having a chip that has to slow down for some instructions, please tell me how a chip whose clock runs at xx Mhz ISNT a xx Mhz chip... You seem to have a blind faith in WDC. If you note, the ABORT instruction in the 65816 does not work according to the way its supposed to. What about that tidbit? >>---hey Apple, wanna buy some chips? > >I hope they don't, unless they do extensive compatibility testing on them. Do you think that they wouldn't? >Don't forget that a 8 Mhz 6502 is running like a 35 to 40 Mhz 8088. That's really interesting. And a bit hard to prove, and completely nonsense if you look at benchmarks, eg. those that appear in Lichty and Eyes on the 65816. >10 Mhz 65C816 can keep up with a 20 Mhz 68000 (but I wouldn't put it up against a 68040). This is not considering video or disk I/O. What??? The particular way that video or disk I/O is implemented is computer, not CPU, specific. So please, don't consider video or disk I/O. >Brian Willoughby Why not contact ASIC, at (818) 597-9165 voice, or (818) 706-2178 fax, and ask them. Why not get their interpretation of the facts before you hit the old red alert? I don't have any connection with these guys. I do have a short fuse however, when there are individuals who will flame for no reason but ignorant cynicism. UUCP: crash!pro-generic!sb ARPA: crash!pro-generic!sb@nosc.mil INET: sb@pro-generic.cts.com
whitewolf@gnh-starport.cts.com (Tae Song) (05/04/90)
>WDC does not have "a team of engineers" -- they have Bill Mensch and his >wife and daughter. The original 65816 mask was laid out BY HAND five >years ago and they have NEVER tried using the state of the art gate array >approach that Tony Fadell had the connections to gain access to. The 65816 was done by Bill Mensch and his SISTER. Bill Mensch did the design and his sister the lay out. All the design was done by Bill's hand (to mylar), because 1) it added to cost of making the chip and 2) he doesn't believe in CAD programs for some reason. His sister did the layout as was mentioned in a rare interview several years ago in Compute magazine when the GS came out. Oh correction I ment it saved money by doing it by hand. On CPU comparisons... the 68000-68030 buffered the clock and produce an internal clock... 1/2 the external clock speed. A 50Mhz 68030 is actually running 25Mhz internally. The 68040 fame is that it doesn't do this, thus a 25Mhz is twice as fast 68030, straight out. The 65816 could've been design to be faster, but been design by hand some logic circuits needed was sacrificed. There's only 3 registers vs 16+ on the 680x0 and Ix86s. There's probablely other things as well... s.
brianw@microsoft.UUCP (Brian WILLOUGHBY) (05/09/90)
In article <1990Apr30.093518.4994@laguna.ccsf.caltech.edu> toddpw@tybalt.caltech.edu (Todd P. Whitesel) writes: >brianw@microsoft.UUCP (Brian WILLOUGHBY) writes: > >>I found it hard to believe (and still do) that some college kid has done a >>better job all by himself than what the Western Design Center can do with >>a team of engineers. [snip] > >WDC does not have "a team of engineers" -- they have Bill Mensch and his >wife and daughter. The original 65816 mask was laid out BY HAND five >years ago and they have NEVER tried using the state of the art gate array >approach that Tony Fadell had the connections to gain access to. So, you believe everything you read on the net? Just because of the "net legend" of the Mensch family, you have extrapolated that there are no other WDC employess? Someone at WDC did extensive research into the interaction between the 65C8xx and the Apple Disk ][ card - has anyone even powered up an Apple ][ with the ASIC chip in it? Before I get all happy about my future computing possibilities, I'd like to hear a little more about what is behind ASIC. Did you know that W.D.Mensch worked for the company that originally designed the 6502? I think that qualifies him to do design work in his kitchen after a decade of experience. I hope you realize that WDC has MANY more customers than Apple Co. They happen to be very popular in the medical industry and with embedded controllers. WDC works with more than the Apple ][, but the ASIC chip hasn't even done that yet! >A couple years ago when I got my hands on the 65816 data sheet I took one >look at the cycle-by-cycle bus state listing (all of two pages) and said >"you know, this CPU is so damn simple it would make a great state machine" >but I wasn't about to try to build one out of PALs and TTL... > >And a year and a half later I find out that somebody else at another college >had the money and the connections to make a 65816 state machine. > >I am very disappointed in WDC that they did not think of this first. Todd, I'm quite impressed with your knowledge of electronics, and I enjoy hearing your ideas. But what I don't enjoy is your ragging on a company when you have no idea what they did. I'll forgive you, though, since this is obviously a religious issue :-) How do you know that WDC *didn't* think of gate arrays? I've learned that gate arrays are great for quick, space-efficient design of logic circuits - but the tradeoff is slower operation. Hard-coded logic takes longer to design, and requires custom fabrication, but the resulting chip is generally faster. Gate arrays are quicker and cheaper to fabricate, bacause they are all the same. There is no difference between the ASIC 65C816 and some other chip - at least not until the array is programmed for the specified circuit paths. I would hardly say that gate array is the optimum design choice for a processor. I suppose that we will find out, but I will wait for the testing stage before I go counting my eggs. >>In addition, WDC rates their processor speed by about 15 different timing >>relationships. They rate data and address input and output timing as well >>as the relationship between different clock and control signals. If any >>ONE of those timing specs does not work at a particular speed, then the >>chip is rated at a lower speed. WDC has chips that might run at 20 MHz >>(that's a guess on my part) in a custom circuit that is designed to work >>around the slower timing ratios. The fact is that the overall CPU speed >>is based on many factors, with the slowest measured timing being the limit. > >No argument here, just don't see how it applies. The ASIC chip is a data >file which gets handed to a chip house and they use it to configure a >gate array they have already designed and tested. Fadell didn't specify >that the chip would run at 20 mhz, the chip house told him that his design >on their gate array would be able to run at 20 mhz with the necessary timing >ratios. It applies because WDC is qualifying their speed claims, but there is no reference for the ASIC chips. What do they mean by 15 MHz? How can a system (or an accelerator card) be designed to use the ASIC chip around such an unqualified rating? I can be sure of what it means when WDC says their chip runs at a certain speed. Without all the timing specs, I don't trust the ASIC speed rating. I still haven't heard of anyone plugging an ASIC chips into a modified TransWarp and actually running Apple ][ software... >WDC's chips might run at 20 mhz -- if you have -10 ns SRAM. WDC's chips >are, bluntly put, sloppily designed compared to the ASIC gate array. Do you really know anything about how the WDC chip was designed? Do you know anything about how the ASIC chip is designed? How do you know which is sloppy and which isn't? You seem to be making many statements based purely on conjecture. The ASIC chip would require the same speed SRAM as the WDC chip if they were running at the same speed. >>A common misconception about integrated circuits is the assumption that >>there are different production runs for each chip speed. Actually, a chip >>manufacturer attempts to make every chip at top speed, and then tests the >>performance before marking them. > >Well, that's true for each spread of speeds. Motorola makes two seperate >production runs for 8-20 mhz chips and for 33-50 mhz chips. >You're otherwise correct. True, there are different technologies being developed all the time. Each successive fabrication technology is generally smaller and faster. Motorola simply didn't shut down their old fabrication facilities because they know that there is a market for the slower (cheaper) chips. Here's an idea: perhaps WDC still produces 65C8xx's with medium speed technology because the bulk of their customers (not Apple) only need a certain amount of speed. Without the capitol investment, and without the promise that there will be a merket, I can see how WDC might not be using the fastest fabrication technology until Apple is willing to commit. This is just a theorization on my part. >>Don't forget that a 8 MHz 6502 is running like a 35 to 40 MHz 8088 >>(although I can't say what speed 80486 it can compete with). Also, a >>10 MHz 65C816 can keep up with a 20 MHz 68000 (but I wouldn't put it >>up against a 68040). This is not considering video or disk I/O. > >Barf! Cross CPU comparisons are generally meaningless. Comparing a IIGS at >2.5 mhz under GS/OS w/ Appleworks GS to a 12 mhz 286 under windows 2 with >Microsoft Works... _that_ means something. Ok, I admit that such comparisons are not final, but I am just tired of so many people assuming that the clock speed of different processors are interchangeable. The point that I was making was that instead of thinking that a 1 MHz 6502 is roughly equivalent to a 1 MHz PC (which is way off), think of it as a 5 MHz PC (which isn't precise, but is much closer to realistic). My gripe is that 20 MHz seems to be a goal that everyone on the net wants the ASIC chips to reach, and I think that this is based on 20 MHz PC performance. I just want to get that sort of comparison out of people's heads. There is much more to computer performance than a couple of numbers. >Todd Whitesel >toddpw @ tybalt.caltech.edu Brian Willoughby UUCP: ...!{tikal, sun, uunet, elwood}!microsoft!brianw InterNet: microsoft!brianw@uunet.UU.NET or: microsoft!brianw@Sun.COM Bitnet brianw@microsoft.UUCP