[comp.sys.apple2] Proposal: Apple II+ 60Hz Timing Signal

mdavis@pro-sol.cts.com (Morgan Davis) (11/01/90)

This is a note to fellow Apple II software developers.  Recently, I've been
studying the possibility of building a small circuit that gives the Apple II+
a 60Hz signal by which software can poll to synchronize timing loops.  This
is more important now than ever since many II+'s are becoming equipped with
faster CPUs (Zip Chips, Transwarps, etc.).

After learning about a 60Hz signal source on the motherboard, I scrapped the
idea of building a circuit using a 555 timer IC.  The source is located on pin
#11 of the 74LS161 at location D-11 (the chip just right of the resistor pack).

I am proposing to the developer community that since we have access to this
timing source that we standardize on how it is used.  My proposal is that this
signal can be safely tied to pin #4 of the 74LS251 at location H-14 (the chip
immediately south of the 16-pin game I/O socket).  This maps to location $C060
in the computer, or the cassette tape input register.

Wiring Diagram:
                          _______
                        [|   7   |]
                        [|   4   |]
                        [|   L   |]
                  D-11  [|   S   |]
                        [|   2   |]----------+ 4
                        [|   5   |]          |
                        [|   1   |]          |
                        [|___n___|]          |
                                             |
   +-------------------//--------------------+
   |      _______
   |    [|   7   |]
   |    [|   4   |]
11 +----[|   L   |]
        [|   S   |]  H-14
        [|   1   |]
        [|   6   |]
        [|   1   |]
        [|___n___|]


This modification is desirable in that it requires only a single wire.  It
is inexpensive and easy to install.  It only involves connecting pins of ICs
instead of hacking into the game I/O socket inputs which would interfere
with a joystick.  Since it uses the cassette tape location (one that is
practically useless today) it doesn't sacrafice a joystick button input.
(Coincidentally, $C060 is known as "butn3" on the IIGS).  This wiring is
compatible with the popular Shift-Key modification and is unobtrusive to
most applications that do not access the cassette tape port.

Unless there is strong objection, I'd like to propose this modification
as the standard by which 8-bit applications synchronize all timing
loops on the Apple II+.

--Morgan Davis

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christer@cs.umu.se (Christer Ericson) (11/01/90)

In article <5391@crash.cts.com> mdavis@pro-sol.cts.com (Morgan Davis) writes:
>This is a note to fellow Apple II software developers.  Recently, I've been
>studying the possibility of building a small circuit that gives the Apple II+
>a 60Hz signal by which software can poll to synchronize timing loops.  This
>is more important now than ever since many II+'s are becoming equipped with
>faster CPUs (Zip Chips, Transwarps, etc.).
>
>After learning about a 60Hz signal source on the motherboard, I scrapped the
>idea of building a circuit using a 555 timer IC.  The source is located on pin
>#11 of the 74LS161 at location D-11 (the chip just right of the resistor pack).
>
> [Stuff deleted]

Without having my old Apple II Reference Manual (the real thing - not the
worthless Apple IIe Ref mind you) around, I'm not sure if this will work on
all Apple IIs, there is this thing about us in Europe having 50Hz current
instead of 60Hz. I'd guess that whatever the 74LS161 at location D-11 is
doing might be somewhat different on the Apple II Europlus (and other
european models). Someone who knows for sure?

>--Morgan Davis

/Christer

| Christer Ericson            Internet: christer@cs.umu.se [130.239.1.101] |
| Department of Computer Science, University of Umea, S-90187 UMEA, Sweden |
|                       "9600<C600.C6FFM 96F8:4C 59 FF N 9600G" -Mr. Xerox |

mdavis@pro-sol.cts.com (Morgan Davis) (11/02/90)

Dru Nelson <dnelson@mthvax.cs.miami.edu> writes:

}  Well, it is a good idea, but there is no need for it.  Most ][+ users
}  have upgraded.  This would have been a great hack in 1981 or 80.
}  There would have been a great opportunity to set a standard.

No, there is a need for it.  I wouldn't have spent as much time hunting down
a solution if I hadn't been asked to make my software compatible with the II+.
You can't say, "there is no need for it" if my customers tell me that they
need it.  Plus, in 1980 there were no other Apple II machines, let alone speed
up cards and processors which would affect hard-coded timing loops.  Back then
it would have been a useless hack for the most part.  Today, it is very
necessary if you writing any time-dependent code that you need to support
on the II+.

}  Now, well, I would be interested in seeing how much support is there
}  for such a thing.

I don't see why you'd care.  It isn't a "let's vote to support it" to see
whether or not it is "interesting" to you.  It is a problem that many
developers have recently come to terms with.  Because unlike the IIe and IIGS
there is no pollable signal in the II+ that allows you to synchronize timing
in the same easy manner that you can on it's predecessors.

} The VBL indicator is already there (as you probably already know).

Of course I know!  How else would I have been able to write up my proposal
if I hadn't known?  The problem with the II+ is that even though it has
a 60Hz signal that lives in the machine, it isn't mapped to a readable
register that software can use.  On the IIe and IIGS, VBL can be detected
by reading $C019.  Not so on the Apple II+.

} p.s. Out of curiousity, would you know the address for any of the 
}      A+ or incider writers?

No.  If I did I wouldn't let anyone else know without asking them first.

} p.s.s. What language do people use to add on to a Proline BBS.  I used
}       to be on one down here and I never asked.  Is it just applesoft
}       on top of your Modemworks?  I ask because I have learned that
}       other BBS systems use a compiled or different language.  I liked
}       the quality of a ProLine bbs and wondered if you used a compiler
}       in any way (the stuff worked nice and fast and unix like)

The languages that ProLine can be used with are Applesoft, MD-BASIC and
6502.  We don't use a compiler (and as you noted, the system is quite
peppy).  All the speed critical things have pure assembly language routines
built into ModemWorks (and AmperWorks) to run even faster than a compiled
(or p-code style) 8-bit language.

} %% Dru Nelson %% Miami, FL %% Internet:  dnelson@mthvax.cs.miami.edu  %%

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mdavis@pro-sol.cts.com (Morgan Davis) (11/02/90)

unknown@ucscb.UCSC.EDU (The Unknown User) writes:

} Why is there a 60 Hz signal coming out of a 4 bit binary counter?

Got me.  I really can't answer that.  There just is.  The four chips from
D-11 to D-14 appear to be dividing an incoming signal that starts out at
60Hz.  Where that actual source is, I don't know.  I just know which pin
I can read that lets me access that signal.

} Could you tell me if they're most significant bit 0 or least
} significant bit 0? (What I'm looking in is the Motorola FAST and LS TTL data
} book)

That I don't know either.  I'm a software guy, not a hardware guy.

} Just trying to understand how you know that that is a 60Hz
} signal coming out and "where it's coming from"...

Magic.  I read a tip here about creating roughly 59.xx Hz interrupts on
the II+ by taking a wire from pin #11 of D-11 to the CPU's interrupt
request line.  I deduced that it must be some sort of near 60Hz signal
(it doesn't have a 50% duty cycle, BTW).  I figured if I routed that signal
to an input I could poll it from software.  The cassette port input seemed
to be the best choice since it is not used much (if at all) these days.

--Morgan

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toddpw@nntp-server.caltech.edu (Todd P. Whitesel) (11/02/90)

>unknown@ucscb.UCSC.EDU (The Unknown User) writes:

>} Why is there a 60 Hz signal coming out of a 4 bit binary counter?

D11-D14 in the ][+ are all 4 bit binary counters. They generate the video
counter. The Mega II allows you to read the exact value of the counter at
C02E and C02F, but that counter started out as four little TTL chips wired
in an ingenious way. Pin #11 of D11 happens to be V5, a.k.a. the hi bit
of C02E in the GS. It goes high for six scan lines at the end of VBL.
Since it has the same period as VBL, it is therefore a 60 Hz signal.

>} Could you tell me if they're most significant bit 0 or least
>} significant bit 0? (What I'm looking in is the Motorola FAST and LS TTL data
>} book)

TTL counters label the least significant bit 0. For the 161 that's pin 14.
Pin 11 is the hi bit of the 4 bit counter.

>} Just trying to understand how you know that that is a 60Hz
>} signal coming out and "where it's coming from"...

Can't speak for Mr. Davis, but I've got an Apple ][ reference manual and a IIgs
technote to back me up. The 60 hz signal is essentially the top bit of the
counter that provides the video address to the rest of the computer.

Todd Whitesel
toddpw @ tybalt.caltech.edu

tomk@pro-sol.cts.com (Tom Kelly) (11/02/90)

In-Reply-To: message from mdavis@pro-sol.cts.com

I am glad to see that you are interested in supporting the ][+.
I still have several of them although I don't use them much.

I feel if more folks took such interest in general, that the "Apple ][ is
dying" scare would only be a very silly rumor.

GRAY@ADMIN.HumberC.ON.CA (Kelly Gray) (11/02/90)

  Morgan Davis <crash!pro-sol.cts.com!mdavis@NOSC.MIL> writes:

> This is a note to fellow Apple II software developers.  Recently, I've been
> studying the possibility of building a small circuit that gives the Apple
> II+ a 60Hz signal by which software can poll to synchronize timing loops.
> This is more important now than ever since many II+'s are becoming equipped
> with faster CPUs (Zip Chips, Transwarps, etc.).
>
  [lots of stuff deleted]
>
> Unless there is strong objection, I'd like to propose this modification
> as the standard by which 8-bit applications synchronize all timing
> loops on the Apple II+.
>
> --Morgan Davis

I think that this isn't a bad idea. There is another advantage to this
modification. The signal being used for the 60 Hz source is the high bit
of the vertical line counter. This bit goes high when the video circuitry
starts to scan line 16 of the text screen, and falls at the end of line 23.
(rows 136 to 128 of hires graphics) This means that a program can synchronize
with the vertical blanking period by waiting for the signal to go from a
1 to a 0.
 If this modification is adopted as a standard for //+ timing loops, it will
also supply a standard equivalent to the VBL signal found in the //e, //c
and //gs

 As has been pointed out though, there are a couple of minor drawbacks to the
modification. It does tie up the cassette input address, making it unusable
for cassette input. Since this is rarely used, it is not much of a problem.
Unfortunately for cassette users, there are only eight addresses on a stock
//+ that can be used to read a one bit input. Four of these addresses are
used by the paddle inputs on the game port, and three more are used by the
button inputs. The last one, and the one least likely to interfere with
anything else, is the cassette input.
 The other drawback is that the timing is different in Eurapples. Apple //+
computers modified for use with PAL monitors will produce a 50Hz signal on
pin 11 of D11. There is no easy way around this, so programmers will have
to either live with the fact that the timing will be about 15% slow on some
Apples, or else incorporate some sort of installation dependant code to allow
the user to adapt the program.

     <o_o>
 _________________________   ________________________________________
/                         \ /                                        \
|        Kelly Gray        |  The opinions expressed in the preceding |
|                          |  message are not guaranteed to represent |
| GRAY@ADMIN.HumberC.ON.CA |  any form of rational thought whatsoever |
\_________________________/ \_________________________________________/

dnelson@mthvax.cs.miami.edu (Dru Nelson) (11/02/90)

  
In <5398@crash.cts.com> mdavis@pro-sol.cts.com (Morgan Davis) writes:
>Dru Nelson <dnelson@mthvax.cs.miami.edu> writes:

>}  Well, it is a good idea, but there is no need for it.  Most ][+ users
>}  have upgraded.  This would have been a great hack in 1981 or 80.
>}  There would have been a great opportunity to set a standard.

>No, there is a need for it.  I wouldn't have spent as much time hunting down
>a solution if I hadn't been asked to make my software compatible with the II+.
>You can't say, "there is no need for it" if my customers tell me that they
>need it.  Plus, in 1980 there were no other Apple II machines, let alone speed
>up cards and processors which would affect hard-coded timing loops.  Back then
>it would have been a useless hack for the most part.  Today, it is very
>necessary if you writing any time-dependent code that you need to support
>on the II+.

 In 1980, it would make animation flicker free and the interupts
 would make a nice little clock.  Could you use the clock routines from
 ProDOS?

>}  Now, well, I would be interested in seeing how much support is there
>}  for such a thing.

>I don't see why you'd care.  It isn't a "let's vote to support it" to see
>whether or not it is "interesting" to you.  It is a problem that many
>developers have recently come to terms with.  Because unlike the IIe and IIGS
>there is no pollable signal in the II+ that allows you to synchronize timing
>in the same easy manner that you can on it's predecessors.

 Luckily, I keep an asbestos suit around :-)

 First of all, I sent you this in mail because I am not interested in
 bogging down the net with my statements of interests.  I said it because
 I was curious about how much people were interested in such a thing.
 A lot of people are posting that it is a good idea, so there is interest.
 It was sort of saying that it would be nice to see what support is there.

 I understand the ][+'s signal/timing limitations. Have you tried reading
 the floating bus for timing?

>} The VBL indicator is already there (as you probably already know).

>Of course I know!  How else would I have been able to write up my proposal
>if I hadn't known?  The problem with the II+ is that even though it has
>a 60Hz signal that lives in the machine, it isn't mapped to a readable
>register that software can use.  On the IIe and IIGS, VBL can be detected
>by reading $C019.  Not so on the Apple II+.

 I know this also, but you didn't mention the other machines so I wasn't
 sure that you knew.  However, I knew who you are and I added the
 "probably".

>} p.s. Out of curiousity, would you know the address for any of the 
>}      A+ or incider writers?

>No.  If I did I wouldn't let anyone else know without asking them first.

  That is understandable, however, I was just asking because some
  post their net address. Joe Abarnathy did an article on the internet and
  he posted his address.  I will look it up when I see my friend, but I
  asked you because you are known to be involved with telecommunications
  a little bit :-)


  p.s. I have an Apple ][+.

-- 
%% Dru Nelson %% Miami, FL %% Internet:  dnelson@mthvax.cs.miami.edu  %%

cyliao@hardy.u.washington.edu (Chun-Yao Liao) (11/03/90)

mmm... just like to know how many others //+ users are still out there...
Can every //+ users drop me a mail? I will sum up and add one (myself)
as a preliminary number of //+ users in this newsgroup :-)



cyliao@wam.umd.edu     		o NeXT :  I put main frame power on two chips.
      @epsl.umd.edu		o people: We put main flame power on two guys.
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 xxxxx@xxxxx.xxx.xxx (reserved)	o RC + Apple // + Classic Music + NeXT = cyliao