SRGHDJE@windy.dsir.govt.nz (07/25/90)
We are about to start designing a system using the NCR53C700 SCSI I/O Processor (SIOP). This looks to be a great chip, it even has 12 pins that the data manual (Rev.2.5) says are "Reserved for Wide SCSI". Unfortunately that's about all it says with respect to future support for wide SCSI. Before getting on with a detailed design, board layout etc. it would be helpful to know what plans there are for these pins. Twelve pins is probably not enough to support even a 16 bit SCSI bus directly. Perhaps these pins will be an interface to another "expander" chip. Does anyone know what NCR's intentions are? Would anyone at NCR care to comment? Dave Evans __________________________________________________________________________ |DSIR Physical Sciences | Internet: srghdje@grv.dsir.govt.nz | |Infomation Tech. Group | Bitnet: srghdje%grv.dsir.govt.nz@relay.cs.net| |P.O. Box 31-311 | | |Lower Hutt | Phone: +64 4 690501 | |New Zealand | Fax: +64 4 690067 | --------------------------------------------------------------------------
cgn@leo.UUCP (Chris Nieves) (07/27/90)
In article <18001@windy.dsir.govt.nz>, SRGHDJE@windy.dsir.govt.nz writes: > > We are about to start designing a system using the NCR53C700 SCSI I/O > Processor (SIOP). This looks to be a great chip, it even has 12 pins > that the data manual (Rev.2.5) says are "Reserved for Wide SCSI". I'll agree that the SIOP is the right way to go...but what are you going to hook up to this design that supports wide scsi?? Everything that is fast is getting smaller and that means no place to put the extra connector. Worry about going faster (10MB) before going wider. ------------------------------------------------------------------------- Chris Nieves UUCP : ccicpg!leo!cgn or cgn@leo.ccicpg USPS : ICL North America, 9801 Muirlands Blvd., Irvine, CA 92718-2521 PHONE: (714) 458-7282 -------------------------------------------------------------------------