CJC105@psuvm.psu.edu (Chris) (02/03/90)
I was thinking about designing an inexpensive processor accelerator for my
final project in a VLSI design class. Basically, I wanted to model my design
after the CMI accelerator. What I lack at this time is technical info
(schematic, hardware manual, etc) and I need some quick advice as the proposal
is due 2/9.
From what I understand about the CMI accelerator, it simply doubles the clock
speed of the 68000 while talking to the bus at 7.14Mhz. The net effect is that
internal operations are done in half the time. I wanted to improve upon this
design by letting the 68000 talk to the bus at 14.28Mhz when there is no
DMA or Blitter conflit.
If someone could comment about the feasibility of this design, or perhaps
recommend alternate design projects it would be greatly appreciated!
Chris Conrad
CJC105@psuvm (bitnet)billsey@agora.UUCP (Bill Seymour) (02/08/90)
In article <90033.211131CJC105@PSUVM.BITNET: CJC105@psuvm.psu.edu (Chris) writes:
:I was thinking about designing an inexpensive processor accelerator for my
:final project in a VLSI design class. Basically, I wanted to model my design
:after the CMI accelerator. What I lack at this time is technical info
:(schematic, hardware manual, etc) and I need some quick advice as the proposal
:is due 2/9.
:
:From what I understand about the CMI accelerator, it simply doubles the clock
:speed of the 68000 while talking to the bus at 7.14Mhz. The net effect is that
:internal operations are done in half the time. I wanted to improve upon this
:design by letting the 68000 talk to the bus at 14.28Mhz when there is no
:DMA or Blitter conflit.
There are actually several other considerations to pay attention to...
Mostly make sure you have some way of synthesising the syncronous buss elements
of the 68000. VMA, VPA, E, etc.. Because the Amiga uses the 8520s for I/O, you
need to be able to support 6800 type peripherals. The clock doubling part is
fairly easy... The syncronous stuff is less so... :-)
You can fairly easily do buss accesses at 14MHz... CMI did that for
ROM accesses in the 500/2000 versions and also in the newest 1000 version.
(They provided for a real ROM socket in the latest 1000 version. It even will
support 512K ROMs for future operating systems, just like the 500/2000)
What you'll find in doing buss accesses at 14MHz is that most peripherals
for the Amiga just don't qupport the faster speed. Any memory board using
the `hidden refresh every cycle' design (Like the 2052 and 2058 as well as
the Supra...) will fail at 14MHz. Some other memory cards work fine at
slightly faster speeds (ie., 10.5MHz) but fail at 14... The micron comes to
mind there... You could always do your own memory that runs at 14, but you'll
probably have to do it as a direct connect to your accelerator, rather than
going through the buss.
:
: Chris Conrad
: CJC105@psuvm (bitnet)
--
-Bill Seymour ...tektronix!reed!percival!agora!billsey
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