[comp.sys.amiga.hardware] 14 mhz

rudolpe@upas.CS.ORST.EDU (RUDOLPh ERIC) (10/17/90)

Here goes again:
I installed a 16mhz 68000p12F (F!) in the rev 5 amiga 500. For the 14mhz signal,
I tried CDAC* XOR 7mhz and (NOT) CDAC* XOR 7mhz with a 74Fast86.
The leads fron agnus to the 86 are about two inches long, solid wire.
The leads from the 86 to the 68k are about 2 inches long also, with ferrite bead.
Now when I turn on the computer, it ALWAYS comes up dark grey first, then 
bright green replaces it. I get 10 short flashes, and one long flash, and it
tries to restart.

I am under the impression that DTACK will hold off weird bus cycles. What is the
problem here, will somebody explain why this is going bad and how I might get 
it to work with some extra logic? In my opinion, this is a very very poor Hack.

Also, please include the number of your server. My server has a HARD time
identifying names. I.E. umbra.cs.orst.edu=128.???.???.??. Thanks.

daveh@cbmvax.commodore.com (Dave Haynie) (10/17/90)

In article <21053@orstcs.CS.ORST.EDU> rudolpe@upas.CS.ORST.EDU (RUDOLPh ERIC) writes:
>Here goes again:
>I installed a 16mhz 68000p12F (F!) in the rev 5 amiga 500. For the 14mhz signal,
>I tried CDAC* XOR 7mhz and (NOT) CDAC* XOR 7mhz with a 74Fast86.

If that's the only logic, you're doomed to failure.  Even ignoring the problems
with the E/VPA*/VMA* logic for now, any accelerated 680x0 must still respond
properly to the standard 68000 bus signals at 7MHz.  So, for example, that
means that you don't drive AS* on the bus until S2, in 7MHz time.  Same for
the DS* lines on read, and on write you wait until S4, again in 7MHz timeframe.
You don't look at DTACK* until the S4->S5 transisiton, 7MHz timeframe, and you
don't count on any valid data until the S6->S7 transition. 

That's the simple basics.  From there, you have to worry about the E/VPA*/VMA*
logic; you can't feed an 8520 the E from a 68000 clocked at 14MHz and expect
it to work right, if at all.  If you're trying this with other hardware, you
really need BR* and BG* to be clocked in and out of the 68000 on the right
clocks, or DMA devices may lock up.  

In short, there's a reason accelerator boards cost more than 74F86s and 
74F74s, and there's also a reason even some commercial accelerator boards
have trouble with expansion hardware.

>Now when I turn on the computer, it ALWAYS comes up dark grey first, then 
>bright green replaces it. I get 10 short flashes, and one long flash, and it
>tries to restart.

Your 68000 is having trouble communicating either with the 8520, Chip RAM,
or very likely both.

>I am under the impression that DTACK will hold off weird bus cycles.

DTACK* gates 68000 access to Chip RAM, true.  But you have to play by its
rules, as described above.

>In my opinion, this is a very very poor Hack.

In that, we are in complete agreement.

-- 
Dave Haynie Commodore-Amiga (Amiga 3000) "The Crew That Never Rests"
   {uunet|pyramid|rutgers}!cbmvax!daveh      PLINK: hazy     BIX: hazy
	Standing on the shoulders of giants leaves me cold	-REM