harris@shumv1.ncsu.edu (Michael Harris) (09/07/90)
Does anyone know some part numbers and companies that make the 1M X 4 80ns Zips for the A3000? My dealer goofed and ordered the wrong kind. I figured that if one of you technical people (CBM or otherwise) knew some part numbers, I could just go to my dealer and say "Just order part XXX" They have tried for the last 2 days to get through to CBM technical support to get the "officially supported" chip numbers. By the way... what is the difference between page mode and static column? (Technically speaking) I have heard that page mode rams are needed for virtual memory support. (Whenever it becomes available in AmigaDOS) I question that requirement. Michael Harris
daves@hpcilzb.HP.COM (Dave Scroggins) (09/08/90)
>Does anyone know some part numbers and companies that make the 1M X 4 >80ns Zips for the A3000? My dealer goofed and ordered the wrong kind. I >figured that if one of you technical people (CBM or otherwise) knew some >part numbers, I could just go to my dealer and say "Just order part XXX" >They have tried for the last 2 days to get through to CBM technical support >to get the "officially supported" chip numbers. Check out the small paper back book that came with your computer. (I think the title is, "Introduction the the Amiga 3000" or some such) It's at home so I can't check for sure. There is a lsit of part numbers and manufacture companies. >By the way... what is the difference between page mode and static column? >(Technically speaking) I have heard that page mode rams are needed for >virtual memory support. (Whenever it becomes available in AmigaDOS) I >question that requirement. The same book also gives a pretty good, basic (at least for me) explaination of the difference between page mode and static column mode RAMs. I don't know about VM support requirements. Dave S.
harris@shumv1.ncsu.edu (Michael Harris) (09/10/90)
The only reason I asked about the memory is because I gave my dealer the part numbers listed in the "Introduction to the Amiga 3000" manual and they sent me DIPs *not* ZIPs. I then assumed that since the part numbers weren't specified as DIP or ZIP that they were all DIP. Also, the manual only explains that Static Column chips can be accessed faster and that the benefits of Static Column chips could not be utilized if Page Mode chips were installed. I was looking for a more technical answer. ie. What is the difference in the design, addressing, etc... Ok, so it is faster... WHY? How is the Static Column logic different from the Page Mode logic? Michael Harris
daveh@cbmvax.commodore.com (Dave Haynie) (09/11/90)
In article <1990Sep10.021111.26231@ncsuvx.ncsu.edu> harris@shumv1.ncsu.edu (Michael Harris) writes: >Also, the manual only explains that Static Column chips can be accessed >faster and that the benefits of Static Column chips could not be utilized >if Page Mode chips were installed. I was looking for a more technical >answer. ie. What is the difference in the design, addressing, etc... Ok, >so it is faster... WHY? How is the Static Column logic different from >the Page Mode logic? In all standard DRAM, there's a basic memory cycle in which row and column addresses are multiplexed. That looks like this: ADDR XXXXXXX-Row-Col-XXXXXXX Basically, the RAS* strobe latches the row address, the CAS* strobe RAS* ---------______-------- latches the column address and turns on the DRAM's outputs. CAS* -------------__-------- In a page mode device, there's a special way to speed things up. If you can somehow determine that the next memory access is going to be on the same page, eg, same row address, as the last one, you can provide multiple CAS* strobes for multiple column addresses. Typically, a row address to data valid time will be 80ns or 100ns (same as the speed rating stamped on the chip), but column address to data valid time might only be 40ns. The page mode cycle looks like this: ADDR XXXXXX-Row-Col-Col-...-Col-XXXXXXX RAS* --------__________________-------- CAS* ------------__--__-...--__-------- This has advantages and disadvantages, depending on your system. Since CAS* and RAS* are latching strobes, it's not necessary to hold the value of the Row or Column address very long after the strobe falls. But it does mean that somehow, a strobe must be created. In the context of the Amiga 3000, there was nothing we could do with page mode DRAM, since it would have been impractical to make a CAS* strobe fast enough for any clever page-tricks. But with static column memory, you have a non-latching column enable. So we get: ADDR XXXXXX-Row-Col-Col-...-Col-XXXXXXX RAS* --------__________________-------- CS* ------------______________-------- The CS* strobe doesn't latch anything. This means that the column address must be held steady until the particular memory operation is finished, but one that is done, a new column address will access a new memory location on the page defined by the row address without needing a strobe of any kind. And that's something we could play some tricks with in the A3000. The trick, of course, is to figure out when the row address doesn't need to change. The 68030's burst mode provides this information automatically, since you know a burst is on the same page for all four words of the burst. So the A3000's memory controller turns a burst mode access into a memory cycle with Row address, RAS*, CS* and four different column addresses, and this takes 11 clock cycles (at 25MHz), rather than the 20 it would take without SCRAM memory. There's also a page detect mode in the 3000. When a cycle occurs and page detect mode is on, RAS* and CS* stay low at the end of a cycle. If the next cycle is on the same page (eg, same row address), that cycle completes in 3 clocks rather than the standard 5 clocks. If the page is different, however, the controller must close the current page and open the new one, which winds up taking 7 clocks rather than 5. If references stay local enough, the times where a page match occurs outweigh those where it misses, and things go faster. The Amiga software tends to jump around in memory enough to make this mode undesirable in normal operation, but we think it may be more useful under UNIX or with some of the accelerator cards one might cook up. >Michael Harris -- Dave Haynie Commodore-Amiga (Amiga 3000) "The Crew That Never Rests" {uunet|pyramid|rutgers}!cbmvax!daveh PLINK: hazy BIX: hazy Get that coffee outta my face, put a Margarita in its place!
harris@hobbes.catt.ncsu.edu (Michael Harris) (10/17/90)
Well, I finally did it. I saved up my money, picked up the phone and ordered
2 megabyes of 80ns 1MegX4 static column zips. An hour later the company I
ordered my memory from calls back and says "We have just been informed that
you must add these memory chips in increments of eight." I said "Oh, you
must be confused... I wanted the 1MegX4 chips... not the 256KX4 chips."
To which the lady on the phone responded, "No, we were told that in order for
the 3000 to realize that you have installed memory, you must completely fill
a bank." Now I'm stunned. I have not heard anything about this on this
net... nor is it printed anywhere in the Introducing the Amiga 3000 manual.
Can someone enlighten me a little? Is this really true? I want to add
1MegX4 chips but can't afford 4 megs right now.
Thanks,
--
Michael Harris - harris@hobbes.catt.ncsu.edu __ ___ ___
North Carolina State University | /\ | | Computer and
"If there isn't time to do it right the first | / \ | | Technologies
time, then how can there be time to do it over?"|__ / /__\ | | Theme Programscott@stsci.EDU (Jim Scott) (10/17/90)
In article <1990Oct17.015046.10982@ncsuvx.ncsu.edu>, harris@hobbes.catt.ncsu.edu (Michael Harris) writes: > Well, I finally did it. I saved up my money, picked up the phone and ordered > 2 megabyes of 80ns 1MegX4 static column zips. An hour later the company I > ordered my memory from calls back and says "We have just been informed that > you must add these memory chips in increments of eight." I said "Oh, you > must be confused... I wanted the 1MegX4 chips... not the 256KX4 chips." > To which the lady on the phone responded, "No, we were told that in order for > the 3000 to realize that you have installed memory, you must completely fill > a bank." Now I'm stunned. I have not heard anything about this on this > net... nor is it printed anywhere in the Introducing the Amiga 3000 manual. > > Can someone enlighten me a little? Is this really true? I want to add > 1MegX4 chips but can't afford 4 megs right now. > > Thanks, > -- > Michael Harris - harris@hobbes.catt.ncsu.edu __ ___ ___ Hiya - Yes, you must populate each bank with all 8 chips. Your confusion lies in the same problem I had at first. 1Mx4 means 1 MegaBIT x 4 ^^^ not 1 MegaBYTE. Therefore you need 8 to get you to 4 MEGABYTES. I bought my 8 chips about a month ago and boy! what a difference. It's great. As to the manual...I think it's pretty well implied. It keeps speaking in terms of banks of 8, and on page 4-20 at the top it finally explicitly says (in italics) "ALL EIGHT SOCKETS MUST BE POPULATED" (true, it is refering at that point to CHIP RAM...but again, all the time before and after this they are talking about banks of 8 for FAST and CHIP....) Happy computing! Jim
evtracy@sdrc.UUCP (Tracy Schuhwerk) (10/17/90)
From article <1990Oct17.015046.10982@ncsuvx.ncsu.edu>, by harris@hobbes.catt.ncsu.edu (Michael Harris): [ Text describing the order for 2 Meg of 1MegX4's deleted ] > Can someone enlighten me a little? Is this really true? I want to add > 1MegX4 chips but can't afford 4 megs right now. They (the place you ordered the 1MegX4's from) are correct! I believe that somewhere in the A3000 documentation it say that you have to add 1MegX4's in banks of 4Meg (8 Chips). I added 4 Meg to my 3000/25/40 about 2 months ago and have had no problems at all with it! It is great to be able to work without worrying about running out of RAM! (Makes those complex objects in SA4D do-able!) -- =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-= _______________ / / / | uunet!sdrc!evtracy / (___ _ /_ /_ _ __ /_/ | evtracy@SDRC.UU.NET / . _____)__(__/ /__/_/_/ /__/_/_/__(/__/ (__/ \ +--------------------- Structural Dynamics Research Corporation (SDRC) - Milford, Ohio =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=
navas@cory.Berkeley.EDU (David C. Navas) (10/18/90)
In article <1990Oct17.015046.10982@ncsuvx.ncsu.edu> harris@hobbes.catt.ncsu.edu (Michael Harris) writes: >Well, I finally did it. I saved up my money, picked up the phone and ordered >2 megabyes of 80ns 1MegX4 static column zips. An hour later the company I > "No, we were told that in order for >the 3000 to realize that you have installed memory, you must completely fill >a bank." Now isn't that typical, blame the computer... ;) Yes, you must install a full bank, and the reason is simple. Each 1Mx4 outputs four bits of information. The A3000 has a 32 bit architecture, therefore you need eight (8x4 = 32) chips to fill a 32 bit, long-word request. I suppose it would be possible to support half-banks, but then each long-word request would require two read-cycles. In other words, there would be a staggering slow-down in your, supposedly, FASTer memory. And then there would be the question of the supporting logic.... If you can only afford 2megs, either buy 16 256x4's, or wait until you can afford 8 1Mx4's. You *could* buy a 16-bit memory board, though why the dickens you'd want to would be beyond me. [I'm a software guy who likes to dabble in hardware, I await correction :)] > >Thanks, >-- >Michael Harris - harris@hobbes.catt.ncsu.edu __ ___ ___ > North Carolina State University | /\ | | Computer and >"If there isn't time to do it right the first | / \ | | Technologies >time, then how can there be time to do it over?"|__ / /__\ | | Theme Program David Navas navas@sim.berkeley.edu "Excuse my ignorance, but I've been run over by my train of thought." -me
jms@tardis.Tymnet.COM (Joe Smith) (10/18/90)
In article <1990Oct17.015046.10982@ncsuvx.ncsu.edu> harris@hobbes.catt.ncsu.edu (Michael Harris) writes: >ordered my memory from calls back and says "We have just been informed that >you must add these memory chips in increments of eight. In order for >the 3000 to realize that you have installed memory, you must completely fill >a bank." Is this really true? Absolutely. Fast RAM on the A3000 is 32 bits wide. This means that with 256Kx4 or 1Mx4 bit chips, you have to intall 8 chips to get 32 bit wide RAM. The minimum upgrade is 1 megabyte with 256Kx4 chips and 8 megabytes with 1Mx4 chips. It's in the owner's manual for the A3000. -- Joe Smith (408)922-6220 | SMTP: jms@tardis.tymnet.com or jms@gemini.tymnet.com BT Tymnet Tech Services | UUCP: ...!{ames,pyramid}!oliveb!tymix!tardis!jms PO Box 49019, MS-C41 | BIX: smithjoe | 12 PDP-10s still running! "POPJ P," San Jose, CA 95161-9019 | humorous dislaimer: "My Amiga 3000 speaks for me."
daveh@cbmvax.commodore.com (Dave Haynie) (10/22/90)
In article <1990Oct17.015046.10982@ncsuvx.ncsu.edu> harris@hobbes.catt.ncsu.edu (Michael Harris) writes: >Well, I finally did it. I saved up my money, picked up the phone and ordered >2 megabyes of 80ns 1MegX4 static column zips. .... "we were told that in order >for the 3000 to realize that you have installed memory, you must completely >fill a bank." Now I'm stunned. This is in fact true. The A3000's Fast memory is organized into four 32 bit wide banks, which will give you 1 Meg banks with 256K x 4 parts or 4 Meg banks with 1 Meg x 4 parts. There is no support in the A3000 hardware to drive any bank as 16 bit memory, nor could there be -- to support 68030 burst mode, this memory is configured as "synchronous" memory, which can only be 32 bits wide, a 68030 requirement. Since the devices are four bits wide, you need 32/4 = 8 chips for any one bank. >Michael Harris - harris@hobbes.catt.ncsu.edu __ ___ ___ -- Dave Haynie Commodore-Amiga (Amiga 3000) "The Crew That Never Rests" {uunet|pyramid|rutgers}!cbmvax!daveh PLINK: hazy BIX: hazy Standing on the shoulders of giants leaves me cold -REM