u855203@probitas.cs.utas.edu.au (Michael Harlow) (04/10/91)
Hi, I have a Lucas (and Frances) which I am trying to get going on an A500 rev 5 Initially it worked sortof (fell over often), and was very unreliable when frances was added (1 min up-time Max !). I had an accident, when the extra lines from the Proc to connector that had to be added melted with the heat from the 020 and shorted the A lines I thought I stuffed the 020 up, so I pushed it into a corner and ordered another 020. (This was over 12 months ago). I since discovered the short and the 020 was ok (I think). Anyway, its even more flakey now, will only come up one in ten goes with any type of 7474 for u7. When it comes up, the power light comes on, then Gurus with a Green (Chip memory Failure) or was it yellow (Exception). When looking with a CRO, it seems that the refresh pulses are there from Agnus to the Chip Drams, but as soon as the ROM startup code tries to test the amount of Chip Mem or maybe its when its writing the exception table, it obviously get a bus error. (If I remove Lucas, the 68k based machine runs fine) So do I have a timing problem ? (obviously Yes) Has somebody else struck this problem ? How tight is the timing from the Lucas Board to the Mother Board ? Should lucas be as close as possible, or does an extra .5 inch not matter ? How robust are the PAL's, could I have blown one, and as such is Brad Fowles still selling the Lucas kits/Pals ? I am currently (slowly) building an EPROM/ROM board to take some diagnostic EPROMS that will just do a continuous RAM Read/write so that the CRO can lock. The 1.2 ROM just does two accesses then resets so the access cycles are hard to examine. Any help will be greatly appreciated. Amy has been down now for 18 months, and I've turned to a 33Mhz 386 for comfort 8(, I'm desperate. Thanks, Mike -- | Michael Harlow | u855203@bruny.cc.utas.edu.au | | GPO Box 1201, | u855203@probitas.cs.utas.edu.au | | Hobart, 7001 | Computer Science Department, | | Tasmania, Australia | University of Tasmania. |