[comp.sys.amiga.hardware] GVP series II controller non-DMA?

d87mt@efd.lth.se (Magnus Thelander) (05/02/91)

I recently spoke to a person stating that the GVP series II A500 HD doesn't use
DMA. It worries me since I am planning to get one. Is this true?

-------------------------------------------------------------------------------
                                        |
Magnus Thelander                        |   "No the polarbears don't walk
Student at Lund institute of technology |    around in the streets of
Sweden                                  |    Stockholm."
                                        |
Internet: d87mt@efd.lth.se              |
FIDO-net: 2:200/123.3                   |
                                        |
-------------------------------------------------------------------------------

rbabel@babylon.rmt.sub.org (Ralph Babel) (05/03/91)

In article <1991May2.164632.3669@lth.se>, d87mt@efd.lth.se
(Magnus Thelander) writes:

> I recently spoke to a person stating that the GVP series
> II A500 HD doesn't use DMA. It worries me since I am
> planning to get one. Is this true?

Nope, not true.

Ralph

c506634@umcvmb.missouri.edu (Eric Edwards) (05/04/91)

In article <1991May2.164632.3669@lth.se> d87mt@efd.lth.se (Magnus Thelander) writes:
> I recently spoke to a person stating that the GVP series II A500 HD doesn't use
> DMA. It worries me since I am planning to get one. Is this true?
 
No.  The Series II is DMA, and a very good DMA controler at that.
Your friend is thinking of the older, "Impact" line that GVP manufactured
before the Series II.  That controler was a decent non-DMA design that used
a large buffer.
 
Unfortunately, GVP muddied things up by calling it "DMA to an on board
buffer" which was marginally true but very misleading.
 
But that was then.  The SeriesII is real, live, DMA controler.
Now, does anyone know if the claimed "dual ported" ram on the Series II 0/8
is also a deception?  I didn't know that made dual-ported simms.....
  
Eric Edwards:  c506634 @  "I say we take off and nuke the entire site
Inet: umcvmb.missouri.edu  from orbit.  It's the only way to be sure."
Bitnet: umcvmb.bitnet      -- Sigourney Weaver, _Aliens_

rbabel@babylon.rmt.sub.org (Ralph Babel) (05/07/91)

In article <c506634.3268@umcvmb.missouri.edu>,
c506634@umcvmb.missouri.edu (Eric Edwards) writes:

> Now, does anyone know if the claimed "dual ported" ram on
> the Series II 0/8 is also a deception?  I didn't know that
> made dual-ported simms.....

"dual port" probably refers to the direct link between SCSI
and on-board RAM. This way, DMA to on-board RAM doesn't have
to go through the Zorro bus, i.e. no bus arbitration is
required and the Zorro bus remains available for other bus
masters.

Ralph

rbabel@babylon.rmt.sub.org (Ralph Babel) (05/09/91)

In article <c506634.3292@umcvmb.missouri.edu>,
c506634@umcvmb.missouri.edu (Eric Edwards) writes:

> The direct link between the controler and onboard ram is a
> good feature. Why muddy it with bogus claims of
> dual-ported ram?

As far as I remember, GVP didn't say "Dual-Port RAM", but
rather "DPRC = Dual-Port RAM Controller". This is the name
of GVP's special DMA chip that is used for the Series-II.

Ralph

c506634@umcvmb.missouri.edu (Eric Edwards) (05/09/91)

In article <07691.AA07691@babylon.rmt.sub.org> rbabel@babylon.rmt.sub.org (Ralph Babel) writes:
>  
> In article <c506634.3268@umcvmb.missouri.edu>,
> c506634@umcvmb.missouri.edu (Eric Edwards) writes:
>  
> > Now, does anyone know if the claimed "dual ported" ram on
> > the Series II 0/8 is also a deception?  I didn't know that
> > made dual-ported simms.....
>  
> "dual port" probably refers to the direct link between SCSI
> and on-board RAM. This way, DMA to on-board RAM doesn't have
> to go through the Zorro bus, i.e. no bus arbitration is
> required and the Zorro bus remains available for other bus
> masters.
 
Well, that's one way to define "dual ported" ram but it's not the normal
definition.   It is correct but deceiving, just last the Impact series was
technically DMA since they did directly access memory.  But this memory was
confined to a buffer space on the adapter board.  
 
The direct link between the controler and onboard ram is a good feature. 
Why muddy it with bogus claims of dual-ported ram?
 
Eric Edwards:  c506634 @  "I say we take off and nuke the entire site
Inet: umcvmb.missouri.edu  from orbit.  It's the only way to be sure."
Bitnet: umcvmb.bitnet      -- Sigourney Weaver, _Aliens_

dougp@pcs1.physics.ucsb.edu (05/12/91)

-Message-Text-Follows-
In article <07691.AA07691@babylon.rmt.sub.org>, rbabel@babylon.rmt.sub.org (Ralph Babel) writes...
>In article <c506634.3268@umcvmb.missouri.edu>,
>c506634@umcvmb.missouri.edu (Eric Edwards) writes:
>"dual port" probably refers to the direct link between SCSI
>and on-board RAM. This way, DMA to on-board RAM doesn't have
>to go through the Zorro bus, i.e. no bus arbitration is
>required and the Zorro bus remains available for other bus
>masters.
> 
>Ralph

Does this mean that this board can not DMA to chip or 0xC00000 fast ram?
Or have they done something clever?

If this board can't DMA to some part of memory, they will either have
a mask entry or hide it by handleing it in the harddrive.device.


Douglas Peale






Extra padding to allow this to be posted. Brain dead news reader I use
throws away messages that have more included text than new text. 
I wouldn't mind so much if it let me edit them, but it throws them away
so I must retype them. I hate VMS!

rbabel@babylon.rmt.sub.org (Ralph Babel) (05/12/91)

In article <11189@hub.ucsb.edu>, dougp@pcs1.physics.ucsb.edu
writes:

> Does this mean that this board can not DMA to chip or
> 0xC00000 fast ram?

Sigh ... once and for all: FULL ZORRO-II DMA!!!

> Or have they done something clever?

I guess so. :-)

Ralph

d87mt@efd.lth.se (Magnus Thelander) (05/13/91)

>Does this mean that this board can not DMA to chip or 0xC00000 fast ram?
>Or have they done something clever?
>
>If this board can't DMA to some part of memory, they will either have
>a mask entry or hide it by handleing it in the harddrive.device.

I was the one who asked the initial question about GVP II not being DMA,
and the answers I got, said that DMA is only used to move the data to a
buffer on the controller. From there the processor has to fetch it, which
makes it a processor-controlled controller.

-------------------------------------------------------------------------------
                                        |
Magnus Thelander                        |   "No the polarbears don't walk
Student at Lund institute of technology |    around in the streets of
Sweden                                  |    Stockholm."
                                        |
Internet: d87mt@efd.lth.se              |
FIDO-net: 2:200/123.3                   |
                                        |
-------------------------------------------------------------------------------