preston@ll.mit.edu (Steven Preston) (06/10/91)
I am assembling a genlock for an A500 and need to know the requirements for taking control of the system clock through the video port. Specifically, how long can the system clock be halted without interrupting things like RAM refresh cycles? There is no documentation on this in either the Amiga service manual or hardware reference guide. Also, any information on Amiga genlock hardware design in general would be greatly appreciated. -- Steve Preston (preston@ll.mit.edu)