tommyk@cs.glasgow.ac.uk (Tommy Kelly) (06/14/90)
In article <1890@xn.LL.MIT.EDU> jjh@XN.LL.MIT.EDU (James J. Hunt) writes: >Would anyone care to comment on the relative advantages and disadvantages of >the Motorola 88100/88200 and the Intel i860 for a shared memory >multiprocessor running MACH. Some researchers at the Swedish Institute of Computer Science (SICS) are using the 88100/88200 in a MACH (I believe) machine. Their 'DATA DIFFUSION MACHINE' uses the write-once aspect of the 200's cache coherency mechanism to allow snarfing. This, they say, allows the machine to act as a shared memory system to the programmer, but as a message passing system to the data coherency mechanisms. There was a report about the DDM in a recent Comp. Arch. News, written by Erik Hagersten of SICS. I don't know how the 860 scores on this, but the SICS guys checked out a number of processors and found that the 88K was the only architecture suitable. I can try to find more details if you want. tk
deraadt@enme.ucalgary.ca (Theo &) (06/15/90)
In article <5473@vanuata.cs.glasgow.ac.uk> tommyk@cs.glasgow.ac.uk (Tommy Kelly) writes: > I don't know how the 860 scores on this, but the SICS guys checked out > a number of processors and found that the 88K was the only architecture > suitable. Of course, the 68040 is in this catagory now too, as long as code cache coherency is not broken by the same processor. No? <tdr. -- SunOS 4.0.3: /usr/include/vm/as.h, Line 44 | Theo de Raadt Is it a typo? Should the '_' be an 's'?? :-) | deraadt@enme.ucalgary.ca