lindsay@gandalf.cs.cmu.edu (Donald Lindsay) (11/01/90)
In article <42589@mips.mips.COM> mash@mips.COM (John Mashey) writes: >In 1986 Motorola presentations,... >The foils also say (exact quote): >1991 - GAAS INTEGER UNIT (>50 MIPS)" Damn fine left-handed guessing! In 1991, I expect several players to be touting numbers bigger than 50. (IBM already quotes 41, after all.) The fact that the chips will be CMOS, not GaAs, is the left-handed part. I should do so well, five years out. >In 1986 Motorola presentations, the 78000 (previous number of 88000) had >the following schedule: > Production (200-500 sets) April 88 >... but it was about 3Q89 >before many production chips were shipped... Five quarters late, on a four-year projection. Middling. >Vendors often have plans they believe in, and things just >don't work that way, and t his happens to almost everybody... Ah, not to be mean about it, but isn't the R4000 overdue? And that 85 MHz R6000? Come to think about it: does anyone remember ANY chip that came in early? Recently, I've noticed a bit more cut-and-thrust than usual: some of the posts (particularly on comp.sys.m88k) have had a distinct "your chip wears army boots!" flavor. We're due for (another) interesting year on comp.arch, with some major announcements due. I'd learn a lot more about these almost-wonderful products from critical analysis than from criticism. Just a thought. -- Don D.C.Lindsay
mash@mips.COM (John Mashey) (11/02/90)
In article <10947@pt.cs.cmu.edu> lindsay@gandalf.cs.cmu.edu (Donald Lindsay) writes: >In article <42589@mips.mips.COM> mash@mips.COM (John Mashey) writes: >Five quarters late, on a four-year projection. Middling. >>Vendors often have plans they believe in, and things just >>don't work that way, and t his happens to almost everybody... > >Ah, not to be mean about it, but isn't the R4000 overdue? And that >85 MHz R6000? Come to think about it: does anyone remember ANY chip >that came in early? re: 85MHz R6000: huh? (The system product was originally announced at 67.5MHz, and that was close, if a little optimistic.l) re: R4000: there is, of course, no announced product called this... Sorry, the only reason I didn't say "everybody" was to allow for the possibility that somewhere, sometime, someone has described leading-edge, aggressive plans, 5 years in advance, that actually happened that way. I thought I'd worded this clearly enough not to single out Motorola, but include just about everybody. I'd NEVER claim that everything we think of happens that way. I included the Moto examples, because I just happened to have a copy of that presentation handy, but I thought I made it clear that leading-edge stuff is HARD, and that it is very easy, hearing one side of these things, and NOT having past track record info available, to become very impressed with ANYBODY's futures. When I give nondisclosure presentations, people DEMAND to hear a futures pitch that goes out 10 years. At any given time, we have a path that goes out a ways, and I'm usually willing to describe it, with the serious caveat that things will change by the time we get there. How could they not? In each round of architectural analysis, you fine-tune: -the set of benchmarks you use, whose statistics keep changing because the compilers do also, and because new programs become relevant. -features you must include, in some cases, in response to features other people include, that you don't know about when you make the first chart. -even if you know what you WANT to do, you may discover it STILL doesn't all fit on the chip, and you have to make (relatively) last-minute tradeoffs. -feedback you get from customers, from the last one. Think about that: it is purest B.S. to tell somebody you know exactly what you're going to do for 10 years, because it means you are NOT going to listen to your customers AT ALL.... and beyond that, even if you have very detailed schedules, and design rules for several generations of processes, and even though some elements of process technology may be predictable, there are still surprises that change your mind. So, it is reasonable to lay out a future directions thing, but it is pretty hard to really be exact on chips whose architectural work hasn't even started. It is very frustrating to give somebody a futures pitch with the same realistic caveats that any engineer, in any company would believe, and be told that the caveats are no good, because company XYZ has "committed" to them a chip in 1997 with X MIPS, and Y MFLOPS, and why can't we do that? (well, the marketeers committed that, not the engineers, that's why....) Anyway, one more time: Look hard at past track records of: performance predictions (are they close, or way off) delivery bug-level when delivered, and record in squashing them Don't take ANYTHING, on faith, from anybody -- -john mashey DISCLAIMER: <generic disclaimer, I speak for me only, etc> UUCP: mash@mips.com OR {ames,decwrl,prls,pyramid}!mips!mash DDD: 408-524-7015, 524-8253 or (main number) 408-720-1700 USPS: MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086
mpogue@dg-rtp.dg.com (Mike Pogue) (11/02/90)
John Mashey writes: > re: 85MHz R6000: huh? (The system product was originally announced at > 67.5MHz, and that was close, if a little optimistic.l) > re: R4000: there is, of course, no announced product called this... Let's not mix SYSTEM announcements with CHIP announcements, eh? Lindsay's point was that the R6000 chip's original performance goal was >85Mhz clock, when in fact, the chip (as it finally ended up) works at a clock speed about 25% lower. John, would you care to comment on the original (announced, leaked, internal, etc.) performance goals for the R6000? -- Mike Pogue Data General Corp. Westboro, MA. Speaking for myself, not my company....
mash@mips.COM (John Mashey) (11/06/90)
In article <1108@dg.dg.com> mpogue@dg-rtp.dg.com (Mike Pogue) writes: >John Mashey writes: > >> re: 85MHz R6000: huh? (The system product was originally announced at >> 67.5MHz, and that was close, if a little optimistic.l) > Let's not mix SYSTEM announcements with CHIP announcements, eh? Lindsay's >point was that the R6000 chip's original performance goal was >85Mhz clock, >when in fact, the chip (as it finally ended up) works at a clock speed about >25% lower. > John, would you care to comment on the original (announced, leaked, internal, >etc.) performance goals for the R6000? Sure. 1) There was a paper called "An 85-MHz ECL RISC Microprocessor ..." that was accepted by ISSCC for Feb 1990, but which ISSCC later cancelled (due to a prior publication in Microprocessor Report believed by ISSCC to be too close.) 2) The RC6280 system was announced at 67.5MHz, in November 1989, with production shipments for 2Q90. It became clear that we weren't going to be able to ship many systems at that clock, and when we asked all our big customers if we should ship at 60MHz or wait until 67, not surprisingly, they all said "at 60MHz, it's the fastest micro that exists. Are you kidding? SHIP." Actually, this is an instructive sequence, not at all atypical: 1) ISSCC numbers are, by tradition "guaranteed never to exceed this", or, put another way "we got 1 chip to run at this speed in a tester". For instance, HP had a talk about a 90MHz chip (which is shipped in systems around 50-60? I think.) 2) When you put them in systems, there are all kinds of annoying intrusions from physical reality, like: 8ns SRAMs are not bought in the local store boards are not chips. systems are not boards. 3) When you are on the leading&bleeding edge, sometimes effective speeds and yields don't come up as fast as you expect. Even if you have a couple running in the lab @ X MHz, there's no guarantee that: you can manufacture a lot of them at X the next batch of chips, which have improvements that will make the sytem run at X+10%, will actually do so 4) An additional source of confusion is when different kinds of numbers get mixed up, like: ISSCC numbers, internal targets (for chips), internal targets (for systems), and margin adjustments (i.e., if the chips don't usually run, say 10% faster than what you ship, you may have no margin, and this is a no-no. 5) Will they ever run at 80MHz or more? Probably, but I certainly wouldn't hazard a guess as to when. So, like I said originally, this stuff is hard work, which can be seen by the number of ECL projects, described in public papers 6-9 months before we announced the RC6280, none of which have yet been shipped, and some of which (I think) have been cancelled or delayed. It's hard work, even with the huge amount of simulation that's done (of course, laeding-edge things always get to break the CAD tools, too :-) Again: a good lesson: even when you're close, even when you have them running in the lab, it's still hard to predict what you can manufacture, and when. Needless to say, it's even harder to accurately predict something that's not even in silicon yet, or not even designed. -- -john mashey DISCLAIMER: <generic disclaimer, I speak for me only, etc> UUCP: mash@mips.com OR {ames,decwrl,prls,pyramid}!mips!mash DDD: 408-524-7015, 524-8253 or (main number) 408-720-1700 USPS: MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086