falken@caen.engin.umich.edu (David R Falkenburg) (03/13/91)
Hello. A few months ago some Motorola people posted a press release on the 88110. Can anybody point me to some specifications other than those briefly outlined in the press release? Is there any documentation available publically which outlines the chip (i.e. similar to the 88100 and 88200 books which have been available for about a year) -dave falkenburg university of michigan college of engineering -- Dave Falkenburg @ University of Michigan Computer Aided Engineering Network ARPA: falken@caen.engin.umich.edu UUCP: umix!caen.engin.umich.edu!falken
mslater@cup.portal.com (Michael Z Slater) (03/15/91)
Motorola made a presentation on the 88110 at the Microprocessor Forum last October. That was when they issued the press release, and as far as I know, no other information has been released. The presentation was sketchy, and did not give many details, other than to say the chip is superscalar and has a new graphics execution unit. It will have caches and MMU on chip, and wil have a total of 1.5 million transistors, which implies caches of 8K each. Michael Slater, Microprocessor Report mslater@cup.portal.com