smit@.ucalgary.ca (Theo Smit) (09/30/89)
I just discovered this newsgroup today by accident - maybe a notice should have been posted to sci.electronics? Anyway, I did a master's degree on the design of a high speed DSP system. I used two NEC uPD77230's to do the real work (Burg's AR algorithm and FFT's), and a 68000 for the user interface and housekeeping. An AMD Am6112 ADC acquired signals through a BB 5320 S/H. 153 kHz sample rate. Great fun. The system was to be used for high speed spectrum analysis. Do many people out there use the NEC uPD 77230? It seems that it would be ideal for complex signal processing since it has twice the registers and internal memory as the Motorola DSP56000 series, plus it does floating point calculation. It also comes with a 512 point FFT blasted in ROM... I hear EPROM versions are now becoming available, too. What about the AT&T DSP-32? This processor (we have some here for testing) has the same general features as the 77230, but a much nicer uP interface (similar to the 56000), and more external memory addressing capability. The new CMOS version can run at clock rates of 50 MHz, which should give 25 MFLOPS peak per processor. One of the research guys in our department is building a PC based system (yuk) with six of these processors in a ring for image processing. We're using the 25 MHz NMOS space heaters for this one. On the subject of DSP chip performance versus general uP's ( I lost the reference aricle ): The big advantage for the DSP chips is that they are optimized for data flow, not weird address mode calculations. (Don't get me wrong; I love the M68000, but not for FFT's). The instruction pipelining in the DSP's can give much greater data calculation rates than a uP/coprocessor combination, and the DSP chips have many internal data buses and internal RAM that allow many calculation operands to be transfered at once. In the updating-prediction-error portion of my Burg algorithm on the uPD77230 (which has a great instruction set, if you like microprogrammable systems), I was able to get a calculation rate of 10.7 MFlops (out of a theoretical maximum speed for the processor of 12 MFlops). This sort of thing would be hard to achieve with a microprocessor. Just thought I'd put in my two bits worth. Theo Smit (smit@enel.UCalgary.CA) Research Engineer, Dept. of EE, U. of Calgary.