gson@blob.hut.fi (Andreas Gustafsson) (01/24/91)
I am having trouble locating a few crucial pieces of information concerning the memory bus timing of the Motorola DSP56001. Firstly, I need to know the delays from the edge of EXTAL to changes in the various memory bus output signals, and the data bus setup/hold requirements relative to EXTAL for memory read cycles. Although the DSP56000/DSP56001 User's Manual claims on page 9-8 that "The timing A, B, and C relative to the edges of an external clock (...) are provided in the DSP56001 Advance Information Data Sheet (ADI1290)", I have been unable to find that information in the data sheet. The External Bus Timing diagram gives the timing of each memory bus signal only in relation to the other memory bus signals; there is no reference to the clock. It is possible to draw some conclusions about the timing of the address, DS, PS, and X/Y signals relative to the clock by examining the timing diagrams for "Synchronous Reset Timing" and "Synchronous Interrupt from Wait State Timing". For RD, WR and the data bus there is no clock-relative timing information at all. Secondly, I need the timing for the BS and WT signals. The User's Manual states on page 9-14 that "... WT timing must satisfy setup and hold timing with respect to the negative-going edge of EXTAL. The setup and hold times are provided in the DSP56001 Advance Information Data Sheet (ADI1290)", but the data sheet never mentions BS or WT. The Motorola DSP literature list refers to a data sheet supplement called "Memory Ready Specification", which I assume contains the information on BS/WT timing. However, our local Motorola distributor has been unable to locate that document despite numerous phone calls over the last six weeks. Our noncommercial DSP card design project is being delayed by the lack of this information. Any help will be greatly appreciated. -- Andreas Gustafsson Internet: gson@niksula.hut.fi Voice: +358 0 563 5592
duerr@motcid.UUCP (Michael L. Duerr) (01/25/91)
From article <1991Jan23.173928.1006@santra.uucp>, by gson@blob.hut.fi (Andreas Gustafsson): > I am having trouble locating a few crucial pieces of information > concerning the memory bus timing of the Motorola DSP56001. Try: Motorola DSP Operations Group 6501 Wm Cannon Dr, W. MD: OE314 Austin, Texas 78735-8598 Phone: 512 891 3230 Fax: 512 8912 2947