crummey@cs.rochester.edu (John M. Mellor-Crummey) (07/24/89)
I don't have access to a MIPS data book and I am interested in knowing
whether either the R2000/R3000 chips support some sort of arithmetic
operations with trap on exceptional conditions (e.g., add with trap on
overflow or subtract with trap on negative). Do the MIPS chips support
some such instruction, or do all exceptional conditions have to be
tested explicitly?
The reason for this query is to help me evaluate the cost of simulating
an instruction counter in software (not a full simulation of a hardware
instruction counter, but one that provides the functionality necessary
for debugging-- it can be used to uniquely identify a point in a
program execution) on the MIPS machines. I have measurements of the
cost of this technique for a suite of programs on a 68020, and I am
interested in refining some projections I have made for the cost on
some select RISC processors. The simulated instruction counter can be
maintained in a register, but when the counter reaches a specified
value (e.g., overflows) control needs to be transferred to a handler. I
need to know whether the MIPS instruction set forces me to explicitly
test for such conditions with an extra instruction for each
increment/decrement of the counter, or whether it supports arithmetic
operations with trap on exceptional conditions which can implicitly
perform the test as part of the update.
--
John Mellor-Crummey 716-275-0922 University of Rochester
crummey@cs.rochester.edu Computer Science Department
...!{allegra,decvax,rutgers}!rochester!crummey Rochester, New York, 14627
--
--
John Mellor-Crummey 716-275-0922 University of Rochester
crummey@cs.rochester.edu Computer Science Department
...!{allegra,decvax,rutgers}!rochester!crummey Rochester, New York, 14627mash@mips.COM (John Mashey) (07/25/89)
In article <1989Jul24.154416.14251@cs.rochester.edu> crummey@cs.rochester.edu (John M. Mellor-Crummey) writes: >I don't have access to a MIPS data book and I am interested in knowing >whether either the R2000/R3000 chips support some sort of arithmetic >operations with trap on exceptional conditions (e.g., add with trap on >overflow or subtract with trap on negative). Do the MIPS chips support >some such instruction, or do all exceptional conditions have to be >tested explicitly? Arithmetic adds & subtracts [ADD, SUB, ADDI] can cause overflow exceptions, hence need no explicit test. -- -john mashey DISCLAIMER: <generic disclaimer, I speak for me only, etc> UUCP: {ames,decwrl,prls,pyramid}!mips!mash OR mash@mips.com DDD: 408-991-0253 or 408-720-1700, x253 USPS: MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086