stolcke@ICSI.Berkeley.EDU (Andreas Stolcke) (04/18/91)
I am having trouble understanding what the percentage for "spec" in the both the dynamic and the static opcode distribution generated by pixie refers to. This item is invariably the one with the highest frequency (in the 30% and 40%'s). The MIPS assembler manual mentions "special instructions", but those include things like exeception return and syscall. The only explanation I can come up with so far is that "spec" refers to exceptions inserted by pixie itself for the purpose of stats collection. But then I don't see why these instruction are included in the stats at all, since they could easily be factored out to give an accurate picture of the instruction set usage of the unpixified program. Please reply by e-mail since I don't usually read this group. Any hints are welcome. -- Andreas Stolcke stolcke@icsi.berkeley.edu International Computer Science Institute stolcke@ucbicsi.bitnet 1957 Center St., Suite 600, Berkeley, CA 94704 (415) 642-4274 ext. 126
cprice@mips.com (Charlie Price) (04/25/91)
In article <1991Apr18.041605.26055@agate.berkeley.edu> stolcke@ICSI.Berkeley.EDU (Andreas Stolcke) writes: >I am having trouble understanding what the percentage for "spec" in >the both the dynamic and the static opcode distribution generated by >pixie refers to. This item is invariably the one with the highest >frequency (in the 30% and 40%'s). > >The MIPS assembler manual mentions "special instructions", but those >include things like exeception return and syscall. I replied via e-mail, but I thought other people might find the answer interesting as well. You can make sense of this if you look at the bit encoding for instructions. You can find this at the end of Appendix A (Instruction set details) in "MIPS RISC Architecture" by Jerry Kane (or the previous version "MIPS R2000 RISC Architecture"). There are a 6-bit "major" opcode field leaving 26 bits for other stuff. Yoy generally want as much "other stuff" as you can get in an instruction for immediate information like addresses, offsets, and constants. The instructions that have individual major opcodes are mainly the sort of instruction that has immediate information (loads, stores, jumps, branches, load immediate, add immediate, etc.). There are major opcodes for other classes of instructions that are further specified by decoding other bits. The other classes are: COPn (the coprocessors), BCOND (branch-on-condition), and SPEC (special). The FP instructions, for instance, are all sub-instructions of the COP1 (Coprocessor 1) instruction. To add confusion, the BCOND instruction class contains only some of the branch-on-condition instructions -- not the ones that need an arithmetic comparison to zero (those are separate major opcodes). Instructions with a "special" major opcode, decode a further 6 bits to determine which operation to perform. This class includes most everything else -- shifts, jump-register, 3-register arithmetic (as opposed to arithmetic with immediate values), 3-register logical, multiply, divide, access to multiply/divide result regs. To answer an obvious question, why "spec" instruction percentage is an interesting statistic from pixstats(1), I would say that it is only somewhat interesting to the average end-user. It exists primarily as an artifact of the instruction encoding. It does represent the non-immediate, non-address instructions and might therefore be interesting to you. Each real instruction is accounted for in the statistics and so the "spec" or "bcond" instruction classes (marked as sucn in the statistics) are just extra information. Charlie Price cprice@mips.mips.com (408) 720-1700 MIPS Computer Systems / 928 Arques Ave. MS 1-03 / Sunnyvale, CA 94086-23650 -- Charlie Price cprice@mips.mips.com (408) 720-1700 MIPS Computer Systems / 928 Arques Ave. MS 1-03 / Sunnyvale, CA 94086-23650