mmeyer@m2.csc.ti.com (Mark Meyer) (05/17/91)
I'm writing some standalone software for a Mips M/120, and I'd
like to set up some simple Ethernet support. I know how to get to the
LANCE registers, and I have the specs for the Am7990 LANCE chip. What
I want to know is: Addresses for LANCE's Initialization Block, and the
Descriptor Ring Pointers in the Initialization Block, all are
specified in 24 bits. The Mips chip has a 32-bit address space.
Where does the LANCE get the other eight address bits?
Atdhvaannkcse.
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Texas Instruments, Inc. CSNET : mmeyer@TI-CSL
Every day, Jerry Junkins is grateful that I don't speak for TI.
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