charney@cs.cornell.edu (Mark Charney) (06/13/91)
Can someone give me the documentation for trunc.w.d?
I'm trying to figure out what is going on with DOUBLE->INT conversion
on my mips chip. I've included a C program, the associated assembly
language file and a dissassembly.
Thanks,
Mark Charney
charney@cs.cornell.edu
---------------------------------------------------------
main()
{
double a=5;
int c;
c = (int) a ;
}
---------------------------------------------------------
.verstamp 2 10
.text
.align 2
.file 2 "con.c"
.globl main
.loc 2 2
# 1 main()
# 2 {
.ent main 2
main:
.option O1
subu $sp, 16
.frame $sp, 16, $31
.loc 2 3
# 3 double a=5;
li.d $f4, 5.0000000000000000e+00
s.d $f4, 8($sp)
.loc 2 5
# 4 int c;
# 5 c = (int) a ;
trunc.w.d $f6, $f4, $14
swc1 $f6, 4($sp)
.loc 2 6
# 6 }
move $2, $0
addu $sp, 16
j $31
.end main
---------------------------------------------------------
---------------------------------------------------------
(I think the meaning of lines starting with "x" is clear.
The others seem to be associated with trunc.w.d.)
MAIN:
[con.c: 5] 0x4001b0: 444ef800 cfc1 t6,$31
[con.c: 5] 0x4001b4: 444ef800 cfc1 t6,$31
x [con.c: 3] 0x4001b8: c7848010 lwc1 $f4,-32752(gp)
x [con.c: 3] 0x4001bc: c7858014 lwc1 $f5,-32748(gp)
[con.c: 5] 0x4001c0: 35c10003 ori at,t6,0x3
[con.c: 5] 0x4001c4: 38210002 xori at,at,0x2
[con.c: 5] 0x4001c8: 44c1f800 ctc1 at,$31
x [con.c: 2] 0x4001cc: 27bdfff0 addiu sp,sp,-16
[con.c: 5] 0x4001d0: 462021a4 cvt.w.d $f6,$f4
x [con.c: 3] 0x4001d4: e7a40008 swc1 $f4,8(sp)
x [con.c: 5] 0x4001d8: e7a60004 swc1 $f6,4(sp)
[con.c: 5] 0x4001dc: 44cef800 ctc1 t6,$31
x [con.c: 3] 0x4001e0: e7a5000c swc1 $f5,12(sp)
x [con.c: 6] 0x4001e4: 27bd0010 addiu sp,sp,16
x [con.c: 6] 0x4001e8: 03e00008 jr ra
x [con.c: 6] 0x4001ec: 00001021 move v0,zero
---------------------------------------------------------pmontgom@euphemia.math.ucla.edu (Peter Montgomery) (06/13/91)
In article <1991Jun12.172740.22629@cs.cornell.edu> charney@cs.cornell.edu (Mark Charney) writes: > >Can someone give me the documentation for trunc.w.d? > >I'm trying to figure out what is going on with DOUBLE->INT conversion >on my mips chip. I've included a C program, the associated assembly >language file and a disassembly. > > # 5 c = (int) a ; > trunc.w.d $f6, $f4, $14 > swc1 $f6, 4($sp) > > [con.c: 5] 0x4001b0: 444ef800 cfc1 t6,$31 > [con.c: 5] 0x4001b4: 444ef800 cfc1 t6,$31 > [con.c: 5] 0x4001c0: 35c10003 ori at,t6,0x3 > [con.c: 5] 0x4001c4: 38210002 xori at,at,0x2 > [con.c: 5] 0x4001c8: 44c1f800 ctc1 at,$31 > [con.c: 5] 0x4001d0: 462021a4 cvt.w.d $f6,$f4 >x [con.c: 5] 0x4001d8: e7a60004 swc1 $f6,4(sp) > [con.c: 5] 0x4001dc: 44cef800 ctc1 t6,$31 >--------------------------------------------------------- I have Gerry Kane's "mips RISC Architecture", Prentice-Hall, 1989. Since register t6 is register 14 (p. D-2), I assume that the $14 on the trunc.w.d macro specifies which scratch register to use. I don't know why the cfc1 t6,$31 apears twice, but the code reads the Control/Status register FCR31 (p. 6-5) into t6 and changes its bottom bits to 01 binary before writing it back. Those are the RM (rounding mode) bits. The 01 says round to zero (p. 6-7). After the cvt.w.d, FCR31 is reset to its saved value from t6. -- Peter L. Montgomery pmontgom@MATH.UCLA.EDU Department of Mathematics, UCLA, Los Angeles, CA 90024-1555 If I spent as much time on my dissertation as I do reading news, I'd graduate.