pat@tifsie (07/16/86)
I am attempting to write a driver for the DEQNA and I'm having some
problems. My current problems relate to getting it into "promiscuous"
mode. The manual is very vague on exactly how to set up the transmit
bdl's byte count. This is a negative (2s comp) value for a normal transmission.
What should the format be set up for a setup packet? The book talks about
a value greater than 128. Is that positive 128 or negative 128?
**** FLAME ON ****
This has got to be one of the worst boards I have ever had to deal with.
The documentation is incredibly vague and sometimes inaccurate. I'm going to
take great pleasure in filling out the reader comment card on this one!
The setup packet is bad news. The engineers who designed this beast
must have something against software people. Organizing the packet in that
format (addresses in COLUMNS in an array, with strategic areas of zeroes
scattered about) is quite anti-social. How much did that save you in hardware
costs, guys? A whole $0.15?
I am also quite concerned about missing interrupts. This comes from personal
experience with looping back a setup packet. I set up the transmit bdl
address registers and in the next statement did a printf to check out the
value of the CSR's. Guess what! The interrupt bits were set, but did an
interrupt actually get generated? Of course not! A DELAY(100) between setting
up the transmit bdl registers and the printf now allows the interrupt to
occurr. DEC's reaction: "...we don't assist people writing device drivers.
Maybe the forthcoming DEQNA hardware fixes will take care of the problem."
Thanks a bunch guys....
This could be a very long battle.
**** FLAME OFF ****
If you know more about the DEQNA than I do, please contact me. I'm getting
tired of fighting with this board.
-----------------
Patrick W. Peters
Texas Instruments
Process Automation Center
P.O. Box 655012, M/S 3635
Dallas, TX 75243
UUCP: {uiucdcs!convex!smu, {rice, sun!texsun}!ti-csl}!tifsie!pat
Voice: (214) 995-2786moroney@jon.dec.com (07/22/86)
>I am attempting to write a driver for the DEQNA and I'm having some >problems. My current problems relate to getting it into "promiscuous" >mode. The manual is very vague on exactly how to set up the transmit >bdl's byte count. This is a negative (2s comp) value for a normal transmission. >What should the format be set up for a setup packet? The book talks about >a value greater than 128. Is that positive 128 or negative 128? That same area of the manual confused me, too. Use the exact same rules as normal BDL's. For example, to place the QNA into promiscuous mode, take the bit value of the "promiscuous" bit (i.e. 2), add 128 (200 octal), and this gives 130 (202 octal). Now, you have the "byte count" that's interpreted differently. You now divide by 2 to get a word count, in this case 65 (101 octal). Since the byte count was even, we clear the "start on odd byte" bit (bit 7 of second word of the BDL). Then negate the word count, so you get 177677 octal which is what you insert in the length word of the BDL (fourth word of BDL). Feed this packet to the QNA, and you are set. Be sure you give it a valid address in the BDL as well, since it loads the network address table in anyway, even though it isn't needed in this case. Rest assured, a new manual is in the works. >The setup packet is bad news. The engineers who designed this beast >must have something against software people. Organizing the packet in that >format (addresses in COLUMNS in an array, with strategic areas of zeroes >scattered about) is quite anti-social. How much did that save you in hardware >costs, guys? A whole $0.15? I believe the person who did the QNA design was a hardware engineer who knew knew little about software, so he didn't realize he was making life difficult for hundreds of programmers in the future. The table format you see is how it is stored inside the QNA, and he saw no reason to change it. >I am also quite concerned about missing interrupts. This comes from personal >experience with looping back a setup packet. Hmm... Did you set the "interrupt enable" bit? Is the CPU priority low enough to allow interrupts? Remember, the QNA needs time to DMA the data, too. -Mike Moroney ..decvax!decwrl!rhea!jon!moroney