[comp.realtime] More on SMART Caching

sjohn@poland.ece.cmu.edu (John Sasinowski) (02/02/91)

	Here is a brief summary of the SMART caching strategy along with
the list of references:

	The SMART cache design strategy is a software controlled
partitioning technique which provides predictable cache performance in
real-time systems.  The cache is divided into segments which are assigned to
tasks to form private partitions.  The partitions are regions of cache that 
can be accessed by only one task.  For effeciency considerations, the number
of segments in a partition should be a power of two.  Since only one task has
access to each partition, no other tasks can overwrite the working set of that
task.  The partitions need not be the same size for every task, so the
divisions of the cache among the tasks can be chosen to provide the best
performance for the set of tasks.

	This work was done by Dave Kirk under the guidance of Jay Strosnider
as part of the ART (Advanced Real-Time Technology) project.  Currently, I am
working on compiler techniques to improve the predictable performance of
caches in real-time systems.

References:
	David B. Kirk
	Process Dependent Static Cache Partitioning for Real-Time Systems
	Proceedings of the Real-Time Systems Symposium, pages 181-190.
	IEEE, Huntsville, AL, December 1988

	David B. Kirk
	SMART (Strategic Memory Allocation for Real-Time) Cache Design
	Proceedings of the Real-Time Systems Symposium, pages 229-237.
	IEEE, Santa Monica, CA, December 1989

	David B. Kirk, Jay K. Strosnider
	SMART (Strategic Memory Allocation for Real-Time) Cache Design
		Using the R3000
	Proceedings of the Real-Time Systems Symposium
	IEEE, Orlando, FL, December 1990

	David B. Kirk
	Predictable Cache Design for Real-Time Systems
	PhD Thesis, Carnegie Mellon University, December 1990
	(Copies available by written request to:
		Jay K. Strosnider
		Department of Electrical and Computer Engineering
		Carnegie Mellon University
		Pittsburgh, PA  15213-3890)

John Sasinowski
sjohn@poland.ece.cmu.edu