davidg@uns-helios.nevada.edu (Davig Gonzales) (09/07/89)
It seems that I sent the following message to some poor soul via E-mail. Sorry about that.... Anyway, here is the re-post. ---------------------------------------------------------------------- hello, In the current issue of ESD (The Electronic System Design Mag.), under Technology Trends, there appears to be more bugs with the current crop of 386's (including 20/25 and 33 MHz versions). While the first two bugs are not too serious the third one can could some problems with OS designers. And I quote: " The third and most serious problem is corruption of the prefetch queue. This happens when: pipelined bus mode is used; paging is enabled; system is running with 1 to 3 wait states; code queue is full; instruction decode is full; the two prefetches that filled the code queue pipelined bus cycles; and the next code prefetch causes a TLB miss." It should be noted that this bug is in the newer versions of the 386 and does not appear in some of the older 386's (including the 16 MHz version). This "newer" version was to overcome some of the problems with the older 386's (paging problem, better FP support, etc...). My question is how common does the abovementioned condition occur? I am in the market for a 20/25-MHz 386 running UNIX (Bell Tech?) and cannot see paying $400+ more for a cached 386 (which overcomes the above problems). Also, has anyone had any experience with the AMI 20-MHz 386 machines (ie - will they run Bell Tech, BOIS support, etc). If anyone is interested, a new version of the "D1-step" should ship by 4Q/89 according to the article. Thanks, David A. Gonzales davidg@uns-helios.nevada.edu