cliffhanger@cup.portal.com (Cliff C Heyer) (09/12/89)
I'm having difficulty getting the specifications of the AT bus strait. What is the speed of the AT bus in MBytes/sec? (Thats millions of 8-bit bytes per second). I know it's rated at 8MHz, but does that mean 8 bits are transferred in parallel with each cycle, or 16 bits with each cycle, or is the transfer serial at 8 Mbits/sec? Is I/O done in blocks so that, for example, 512 bytes can be transferred via one I/O instruction, and the CPU can go on to do other work while the transfer takes place? (DMA) Or does the CPU have to issue a memory write instruction for each byte? Please POST your answers.
eric@MKS.COM (Eric Gisin) (09/13/89)
In article <22080@cup.portal.com>, cliffhanger@cup.portal.com (Cliff C Heyer) writes:
< I'm having difficulty getting
< the specifications of the AT bus
< strait.
<
< What is the speed of the AT bus
< in MBytes/sec? (Thats
< millions of 8-bit bytes per second).
<
< I know it's rated at 8MHz, but does
< ...
The original AT had a 6MHz processor.
Each bus cycle takes 3 to 10 processor clock cycles.
The cycle time for 16-bit operations is 0.5 usec, with 4MB/sec bandwidth.
The cycle time for 8-bit operations is 1 usec, with 1MB/sec.
The cycle time for DMA is 1.66 usec, with 1.2MB/sec (16 bit) or 0.6MB/sec (8 bit)